blob: 7a09ac0dee738afca0d30ddcec126e9ff502ea98 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
|
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010-2012 NVIDIA CORPORATION. All rights reserved.
*
* See file CREDITS for list of people who contributed to this
* project.
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include <linux/sizes.h>
#include "tegra20-common.h"
/* High-level configuration options */
#define CONFIG_TEGRA_BOARD_STRING "Compal Paz00"
/* Board-specific serial config */
#define CONFIG_TEGRA_ENABLE_UARTA
#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE
#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00
/* Environment in eMMC, at the end of 2nd "boot sector" */
#include "tegra-common-post.h"
#endif /* __CONFIG_H */
|
