summaryrefslogtreecommitdiff
path: root/include/configs/chromebook_link.h
AgeCommit message (Expand)AuthorFilesLines
2017-02-07x86: link: Add build options for SPLSimon Glass1-0/+9
2015-04-29x86: Move CONFIG_ENV_IS_IN_SPI_FLASH to x86-common.hBin Meng1-0/+3
2015-04-16x86: Move common Chromebook config into a separate fileSimon Glass1-60/+1
2015-01-24x86: config: chromebook_link: Enable environmentSimon Glass1-0/+7
2015-01-24x86: config: Enable hook for saving MRC configurationSimon Glass1-0/+1
2015-01-13x86: Remove CONFIG_DISPLAY_CPUINFO in chromebook_link.hBin Meng1-1/+0
2015-01-13x86: Make chromebook_link the default board for corebootBin Meng1-1/+0
2015-01-13x86: Move CONFIG_SYS_CAR_xxx to KconfigBin Meng1-2/+2
2015-01-13x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to KconfigBin Meng1-2/+0
2014-12-18x86: Rename coreboot-serial to x86-serialBin Meng1-1/+1
2014-12-18x86: Include FSP and CMC binary in the u-boot.rom build rulesBin Meng1-1/+1
2014-12-18x86: Use consistent name XXX_ADDR for binary blob flash addressBin Meng1-1/+1
2014-11-25x86: chromebook_link: Enable the Chrome OS ECSimon Glass1-0/+5
2014-11-25x86: chromebook_link: Enable the x86 emulatorSimon Glass1-0/+4
2014-11-25x86: config: Enable video support for chromebook_linkSimon Glass1-7/+3
2014-11-25x86: config: Enable SPI for chromebook_linkSimon Glass1-4/+0
2014-11-25x86: config: Enable USB on linkSimon Glass1-2/+0
2014-11-25x86: dts: Add SATA settings for linkSimon Glass1-1/+0
2014-11-25x86: config: Enable plug-and-play for link PCISimon Glass1-0/+3
2014-11-25x86: Remove board_early_init_r()Simon Glass1-1/+0
2014-11-21x86: ivybridge: Implement SDRAM initSimon Glass1-0/+4
2014-11-21x86: chromebook_link: Enable GPIO supportSimon Glass1-3/+1
2014-11-21x86: ivybridge: Enable PCI in early initSimon Glass1-2/+12
2014-11-21x86: Build a .rom file which can be flashed to an x86 machineSimon Glass1-0/+2
2014-11-21x86: Add chromebook_link boardSimon Glass1-0/+60
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-01 04:11:13 +0000