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path: root/drivers/ddr
AgeCommit message (Expand)AuthorFilesLines
2018-02-14Revert "drivers/ddr/fsl: Dual-license DDR driver"Tom Rini17-17/+17
2018-02-09drivers/ddr/fsl: Dual-license DDR driverYork Sun17-17/+17
2018-01-30drivers/ddr/fsl: Cleanup unused variableYork Sun5-5/+0
2018-01-30drivers/ddr/fsl: Modify binding registers to save time on data initYork Sun1-11/+49
2018-01-30drivers/ddr/fsl: Add calculation of register control wordsYork Sun3-7/+48
2018-01-30drivers/ddr/fsl: Add 3DS RDIMM supportYork Sun5-14/+80
2018-01-30drivers/ddr/fsl: Fix workaround for A009803York Sun1-1/+1
2018-01-30drivers/ddr/fsl: Fix DDR4 RDIMM supportYork Sun3-22/+40
2018-01-27Merge git://git.denx.de/u-boot-socfpgaTom Rini1-4/+4
2018-01-26Merge git://git.denx.de/u-boot-spiTom Rini1-4/+4
2018-01-25ddr: altera: silence PHY calibration unless in debug modeGoldschmidt Simon1-4/+4
2018-01-24wait_bit: use wait_for_bit_le32 and remove wait_for_bitÁlvaro Fernández Rojas1-4/+4
2018-01-23ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCsRajesh Bhagat1-1/+3
2018-01-19ddr: marvell: update ddr controller init and freqChris Packham3-21/+34
2018-01-19ddr: marvell: update additional ODT settingChris Packham1-8/+14
2018-01-19ddr: marvell: use correct TREFI valueChris Packham1-1/+1
2018-01-19ddr: marvell: only assert M_ODT[0] on write for a single CSChris Packham3-8/+13
2017-09-11armv8: ls1088a: Add NXP LS1088A SoC supportAshish Kumar1-1/+1
2017-08-16env: Rename getenv/_f() to env_get()Simon Glass3-8/+8
2017-08-13arm: mvebu: ddr3_debug: remove self assignmentsxypron.glpk@gmx.de1-9/+0
2017-08-13arm: mvebu: remove self assignmentxypron.glpk@gmx.de1-2/+0
2017-07-12driver/ddr: Add support for setting timing in hws_topology_mapMarek Behún2-0/+15
2017-06-16treewide: remove unneeded semicolonsMasahiro Yamada1-1/+1
2017-06-12driver: ddr: fsl: Fix compiling error for DDR2York Sun1-0/+4
2017-06-05common: arm: freescale: layerscape: Move header files out of common.hSimon Glass4-4/+8
2017-06-05common: freescale: Move arch-specific declarationsSimon Glass5-0/+13
2017-04-18Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini1-36/+36
2017-04-18ddr: fsl: incorrect logical constraint in populate_memctl_optionsxypron.glpk@gmx.de1-1/+1
2017-04-17drivers: ddr: fsl: fix unused-const-variable warningsThomas Schaefer1-36/+36
2017-04-14Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini3-1/+9
2017-04-14arm: socfpga: Convert Altera DDR SDRAM driver to use KconfigLey Foon Tan3-1/+9
2017-04-13board_f: Rename initdram() to dram_init()Simon Glass1-2/+2
2017-04-05board_f: Drop return value from initdram()Simon Glass1-0/+2
2017-01-04ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun9-64/+64
2017-01-04ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to KconfigYork Sun1-0/+14
2017-01-04powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun1-0/+15
2017-01-04arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun1-0/+21
2017-01-04fsl_ddr: Move DDR config options to driver KconfigYork Sun2-1/+123
2016-12-05fsl/ddr: Add erratum_a009942_check_cpo and clean related erratumShengzhou Liu3-31/+134
2016-12-05fsl/ddr: Fix compiling warningShengzhou Liu1-32/+25
2016-11-23powerpc: MPC8555: Remove macro CONFIG_MPC8555York Sun2-2/+2
2016-11-23powerpc: mpc8541: Remove macro CONFIG_MPC8541York Sun2-2/+2
2016-10-27ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See1-0/+3
2016-10-06Various, accumulated typos collected from around the tree.Robert P. J. Day1-1/+1
2016-09-26Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini4-40/+213
2016-09-26driver: ddr: fsl_mmdc: Pass board parameters through data structureYork Sun1-19/+19
2016-09-23drivers: squash lines for immediate returnMasahiro Yamada3-25/+5
2016-09-14ddr: fsl: fix a compile issueShaohui Xie1-1/+6
2016-09-14driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012aShengzhou Liu2-0/+157
2016-09-14driver/ddr/fsl: Revise workaround A008511 for A009803York Sun1-36/+47
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