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path: root/drivers/ddr/altera/sequencer.c
AgeCommit message (Expand)AuthorFilesLines
2024-07-22drivers: ddr: Remove duplicate newlinesMarek Vasut1-2/+0
2024-05-20Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"Tom Rini1-1/+1
2024-05-19Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""Tom Rini1-1/+1
2024-05-07ddr: Remove <common.h> and add needed includesTom Rini1-1/+1
2022-01-13drivers/ddr/altera/sequencer.c: Fix spelling of "resetting".Vagrant Cascadian1-1/+1
2021-09-22ddr: altera: use KBUILD_BASENAME instead of __FILE__Marek Vasut1-4/+4
2021-02-24dm: ddr: socfpga: don't assign values that are not usedHeinrich Schuchardt1-7/+0
2020-05-18common: Drop log.h from common headerSimon Glass1-0/+1
2020-02-05ddr: altera: Add DDR2 support to Gen5 driverMarek Vasut1-36/+158
2019-07-21dm: ddr: socfpga: fix gen5 ddr driver to not use bssSimon Goldschmidt1-635/+711
2019-04-17arm: socfpga: move gen5 SDR driver to DMSimon Goldschmidt1-1/+8
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini1-2/+1
2018-01-25ddr: altera: silence PHY calibration unless in debug modeGoldschmidt Simon1-4/+4
2016-04-20ddr: altera: Repair DQ window centering codeMarek Vasut1-8/+7
2016-04-20ddr: altera: Staticize global variablesMarek Vasut1-4/+4
2016-04-20ddr: altera: Make DLEVEL behavior inclusiveMarek Vasut1-66/+66
2016-04-20ddr: altera: Zero DM IN delay in scc_mgr_zero_group()Marek Vasut1-3/+13
2016-04-20ddr: altera: Remove unnecessary ODT mode configMarek Vasut1-1/+0
2016-04-20ddr: altera: Remove unnecessary update of the SCCMarek Vasut1-1/+0
2016-04-20ddr: altera: Fix scc_mgr_set() argument orderMarek Vasut1-1/+1
2016-04-20ddr: altera: Tweak DQS tracking enable handlingMarek Vasut1-2/+5
2016-04-20ddr: altera: Replace ad-hoc constant with macroMarek Vasut1-2/+2
2015-08-23ddr: altera: Repair uninited variableMarek Vasut1-1/+1
2015-08-23ddr: altera: Replace float multiplication with integer oneMarek Vasut1-1/+1
2015-08-08ddr: altera: sequencer: Clean checkpatch issuesMarek Vasut1-71/+88
2015-08-08ddr: altera: sequencer: Clean data typesMarek Vasut1-48/+48
2015-08-08ddr: altera: sequencer: Pluck out misc macros from codeMarek Vasut1-22/+15
2015-08-08ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VALMarek Vasut1-4/+4
2015-08-08ddr: altera: sequencer: Zap VFIFO_SIZEMarek Vasut1-4/+4
2015-08-08ddr: altera: sequencer: Wrap misc remaining macrosMarek Vasut1-0/+2
2015-08-08ddr: altera: sequencer: Pluck out IO_* macros from codeMarek Vasut1-101/+100
2015-08-08ddr: altera: sequencer: Wrap IO_* macrosMarek Vasut1-0/+2
2015-08-08ddr: altera: sequencer: Pluck out RW_MGR_* macros from codeMarek Vasut1-146/+146
2015-08-08ddr: altera: sequencer: Wrap RW_MGR_* macrosMarek Vasut1-0/+4
2015-08-08ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_initMarek Vasut1-6/+8
2015-08-08ddr: altera: sequencer: Zap unused params and macrosMarek Vasut1-48/+1
2015-08-08ddr: altera: sequencer: Move qts-generated files to board dirMarek Vasut1-4/+9
2015-08-08ddr: altera: Clean up of delay_for_n_mem_clocks() part 5Marek Vasut1-3/+5
2015-08-08ddr: altera: Clean up of delay_for_n_mem_clocks() part 4Marek Vasut1-12/+5
2015-08-08ddr: altera: Clean up of delay_for_n_mem_clocks() part 3Marek Vasut1-18/+6
2015-08-08ddr: altera: Clean up of delay_for_n_mem_clocks() part 2Marek Vasut1-8/+10
2015-08-08ddr: altera: Clean up of delay_for_n_mem_clocks() part 1Marek Vasut1-14/+13
2015-08-08ddr: altera: Minor clean up of rw_mgr_mem_handoff()Marek Vasut1-7/+8
2015-08-08ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo()Marek Vasut1-22/+27
2015-08-08ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_end()Marek Vasut1-38/+21
2015-08-08ddr: altera: Clean up rw_mgr_mem_calibrate_write_test_issue()Marek Vasut1-13/+18
2015-08-08ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3Marek Vasut1-1/+11
2015-08-08ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2Marek Vasut1-39/+36
2015-08-08ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 1Marek Vasut1-205/+201
2015-08-08ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 5Marek Vasut1-1/+6
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