Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2008-10-18 | Add debug information for DDR controller registers | Haiying Wang | 1 | -0/+13 |
2008-10-18 | Check DDR interleaving mode | Haiying Wang | 2 | -5/+112 |
2008-10-18 | Pass dimm parameters to populate populate controller options | Haiying Wang | 4 | -87/+7 |
2008-10-18 | Make DDR interleaving mode work correctly | Haiying Wang | 2 | -12/+54 |
2008-10-18 | rename CFG_ macros to CONFIG_SYS | Jean-Christophe PLAGNIOL-VILLARD | 1 | -7/+7 |
2008-09-13 | Coding style cleanup, update CHANGELOG | Wolfgang Denk | 1 | -15/+15 |
2008-09-07 | Fix compiler warning in mpc8xxx ddr code | Kumar Gala | 1 | -2/+4 |
2008-08-27 | FSL DDR: Add DDR2 DIMM paramter support | Kumar Gala | 1 | -0/+339 |
2008-08-27 | FSL DDR: Add DDR1 DIMM paramter support | Kumar Gala | 1 | -0/+343 |
2008-08-27 | FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. | Kumar Gala | 9 | -0/+2418 |