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path: root/cpu/mpc85xx/tlb.c
AgeCommit message (Expand)AuthorFilesLines
2010-04-13ppc: Move cpu/$CPU to arch/ppc/cpu/$CPUPeter Tyser1-277/+0
2010-01-05ppc/85xx: Make SPD DDR TLB setup code use dynamic entry allocationKumar Gala1-6/+6
2010-01-05ppc/85xx: Add tracking of TLB CAM usageKumar Gala1-0/+64
2009-11-13ppc/85xx: Fix how we determine the number of CAM entriesKumar Gala1-2/+2
2009-09-15ppc/85xx: add boot from NAND/eSDHC/eSPI supportMingkai Hu1-0/+2
2009-09-15ppc/85xx: Move code around to prep for NAND_SPLKumar Gala1-23/+23
2009-09-15ppc/85xx: Repack tlb_table to save spaceKumar Gala1-4/+5
2009-09-15ppc/85xx: Introduce low level write_tlb functionKumar Gala1-13/+3
2009-09-15ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.Scott Wood1-0/+3
2009-09-08ppc/85xx: Add a simple function to search the TLBKumar Gala1-0/+27
2009-08-22Prepare 2009.08-rc3v2009.08-rc3Wolfgang Denk1-1/+1
2009-08-1485xx: Fix addrmap to include memoryKumar Gala1-6/+22
2009-06-1285xx: Use print_size to report amount of memory not mapped by TLBsKumar Gala1-1/+1
2009-06-0985xx: bugfix for reading maximum TLB size on mpc85xxFredrik Arnerup1-1/+1
2009-02-1685xx: Fix how we map DDR memoryKumar Gala1-47/+27
2009-01-13Change DDR tlb start entry to CONFIG param for 85xxHaiying Wang1-1/+5
2008-12-1985xx: Add support to populate addr map based on TLB settingsKumar Gala1-0/+34
2008-10-18rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD1-1/+1
2008-08-27FSL DDR: Add e500 TLB helper for DDR codeKumar Gala1-0/+64
2008-01-23Coding Style Cleanup; update CHANGELOGWolfgang Denk1-1/+0
2008-01-1785xx: Get ride of old TLB setup codeKumar Gala1-2/+0
2008-01-1785xx: Introduce new tlb APIKumar Gala1-0/+95
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