diff options
Diffstat (limited to 'arch/arm/dts/bcm6753.dtsi')
| -rw-r--r-- | arch/arm/dts/bcm6753.dtsi | 208 |
1 files changed, 208 insertions, 0 deletions
diff --git a/arch/arm/dts/bcm6753.dtsi b/arch/arm/dts/bcm6753.dtsi new file mode 100644 index 0000000000..e88ab095c2 --- /dev/null +++ b/arch/arm/dts/bcm6753.dtsi @@ -0,0 +1,208 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2022 Philippe Reynes <philippe.reynes@softathome.com> + */ + +#include "skeleton.dtsi" + +/ { + compatible = "brcm,bcm6753"; + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + u-boot,dm-pre-reloc; + + cpu0: cpu@0 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x0>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x1>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + cpu2: cpu@2 { + compatible = "arm,cortex-a7"; + device_type = "cpu"; + reg = <0x2>; + next-level-cache = <&l2>; + u-boot,dm-pre-reloc; + }; + + l2: l2-cache0 { + compatible = "cache"; + u-boot,dm-pre-reloc; + }; + }; + + clocks { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + u-boot,dm-pre-reloc; + + periph_osc: periph-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <200000000>; + u-boot,dm-pre-reloc; + }; + + hsspi_pll: hsspi-pll { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&periph_osc>; + clock-mult = <2>; + clock-div = <1>; + }; + + refclk50mhz: refclk50mhz { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + }; + }; + + ubus { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + u-boot,dm-pre-reloc; + + uart0: serial@ff812000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0xff812000 0x1000>; + clock = <50000000>; + + status = "disabled"; + }; + + wdt1: watchdog@ff800480 { + compatible = "brcm,bcm6345-wdt"; + reg = <0xff800480 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt2: watchdog@ff8004c0 { + compatible = "brcm,bcm6345-wdt"; + reg = <0xff8004c0 0x14>; + clocks = <&refclk50mhz>; + }; + + wdt-reboot { + compatible = "wdt-reboot"; + wdt = <&wdt1>; + }; + + gpio0: gpio-controller@0xff800500 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800500 0x4>, + <0xff800520 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio1: gpio-controller@0xff800504 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800504 0x4>, + <0xff800524 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio2: gpio-controller@0xff800508 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800508 0x4>, + <0xff800528 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio3: gpio-controller@0xff80050c { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff80050c 0x4>, + <0xff80052c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio4: gpio-controller@0xff800510 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800510 0x4>, + <0xff800530 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio5: gpio-controller@0xff800514 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800514 0x4>, + <0xff800534 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio6: gpio-controller@0xff800518 { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff800518 0x4>, + <0xff800538 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + gpio7: gpio-controller@0xff80051c { + compatible = "brcm,bcm6345-gpio"; + reg = <0xff80051c 0x4>, + <0xff80053c 0x4>; + gpio-controller; + #gpio-cells = <2>; + + status = "disabled"; + }; + + nand: nand-controller@ff801800 { + compatible = "brcm,nand-bcm6753", + "brcm,brcmnand-v5.0", + "brcm,brcmnand"; + reg-names = "nand", "nand-int-base", "nand-cache"; + reg = <0xff801800 0x180>, + <0xff802000 0x10>, + <0xff801c00 0x200>; + parameter-page-big-endian = <0>; + + status = "disabled"; + }; + + leds: led-controller@ff803000 { + compatible = "brcm,bcm6753-leds"; + reg = <0xff803000 0x3480>; + + status = "disabled"; + }; + }; +}; |