diff options
| -rw-r--r-- | README | 3 | ||||
| -rw-r--r-- | drivers/usb/host/Kconfig | 11 | ||||
| -rw-r--r-- | include/configs/tegra114-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra124-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra20-common.h | 8 | ||||
| -rw-r--r-- | include/configs/tegra210-common.h | 3 | ||||
| -rw-r--r-- | include/configs/tegra30-common.h | 3 |
7 files changed, 11 insertions, 23 deletions
@@ -793,9 +793,6 @@ The following options need to be configured: Supported are USB Keyboards and USB Floppy drives (TEAC FD-05PUB). - CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the - txfilltuning field in the EHCI controller on reset. - CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2 HW module registers. diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 5d0855ffcc..8240ed8a44 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -268,6 +268,17 @@ config USB_EHCI_FSL select EHCI_HCD_INIT_AFTER_RESET ---help--- Enables support for the on-chip EHCI controller on FSL chips. + +config USB_EHCI_TXFIFO_THRESH + hex + depends on USB_EHCI_TEGRA + default 0x10 + help + This parameter affects a TXFILLTUNING field that controls how much + data is sent to the latency fifo before it is sent to the wire. + Without this parameter, the default (2) causes occasional Data Buffer + Errors in OUT packets depending on the buffer address and size. + endif # USB_EHCI_HCD config USB_OHCI_HCD diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 7420831589..87ec1f5a99 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -55,7 +55,4 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA114_COMMON_H_ */ diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 314486a1bc..f509784a86 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -57,9 +57,6 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - /* GPU needs setup */ #define CONFIG_TEGRA_GPU diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index a2b14d8ead..71867bb6ba 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -69,12 +69,4 @@ #define TEGRA_LP0_VEC #endif -/* - * This parameter affects a TXFILLTUNING field that controls how much data is - * sent to the latency fifo before it is sent to the wire. Without this - * parameter, the default (2) causes occasional Data Buffer Errors in OUT - * packets depending on the buffer address and size. - */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA20_COMMON_H_ */ diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 3ba12bec0e..e510820786 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -46,9 +46,6 @@ "fdt_addr_r=0x83000000\0" \ "ramdisk_addr_r=0x83420000\0" -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - /* GPU needs setup */ #define CONFIG_TEGRA_GPU diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index a68da5ddfc..04fcf11ed8 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -52,7 +52,4 @@ /* Defines for SPL */ -/* For USB EHCI controller */ -#define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 - #endif /* _TEGRA30_COMMON_H_ */ |