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| author | Tom Rini <trini@ti.com> | 2014-01-06 14:07:08 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-01-06 14:07:08 -0500 |
| commit | e7be18225fbea76d1f0034b224f0d1e60f07cfcf (patch) | |
| tree | 6da1280e9e98b360a06177184105278c4f4c9e46 /include | |
| parent | 895ec893a9df56b915b6ca1fa2ceba8fad7faf3d (diff) | |
| parent | 8c618dd66adfab736b88a86f51c057b019988a90 (diff) | |
| download | u-boot-e7be18225fbea76d1f0034b224f0d1e60f07cfcf.tar.gz u-boot-e7be18225fbea76d1f0034b224f0d1e60f07cfcf.tar.bz2 u-boot-e7be18225fbea76d1f0034b224f0d1e60f07cfcf.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/B4860QDS.h | 2 | ||||
| -rw-r--r-- | include/configs/BSC9131RDB.h | 2 | ||||
| -rw-r--r-- | include/configs/BSC9132QDS.h | 2 | ||||
| -rw-r--r-- | include/configs/CMS700.h | 3 | ||||
| -rw-r--r-- | include/configs/P1010RDB.h | 2 | ||||
| -rw-r--r-- | include/configs/P1022DS.h | 2 | ||||
| -rw-r--r-- | include/configs/T1040QDS.h | 3 |
7 files changed, 12 insertions, 4 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 3c6cd61342..c182158be4 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -289,6 +289,8 @@ unsigned long get_board_ddr_clk(void); /* NAND Flash on IFC */ #define CONFIG_NAND_FSL_IFC +#define CONFIG_SYS_NAND_MAX_ECCPOS 256 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 #define CONFIG_SYS_NAND_BASE 0xff800000 #ifdef CONFIG_PHYS_64BIT #define CONFIG_SYS_NAND_BASE_PHYS (0xf00000000ull | CONFIG_SYS_NAND_BASE) diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index 4aed5afa37..584aba8d0e 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -29,7 +29,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index f025e3197b..6170cbc81f 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -38,7 +38,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index 4a5fc864a6..0bb22be9f3 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -149,6 +149,9 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_MAX_ECCPOS 48 + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index fe5309a227..ea5cb6501b 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -37,7 +37,7 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_NAND_BOOT #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index ba43ccec60..934a6cb7a6 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -75,6 +75,8 @@ #endif #define CONFIG_NAND_FSL_ELBC +#define CONFIG_SYS_NAND_MAX_ECCPOS 56 +#define CONFIG_SYS_NAND_MAX_OOBFREE 5 #ifdef CONFIG_NAND #define CONFIG_SPL diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index d0ebd6aba8..7d0bc043f9 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -233,6 +233,7 @@ unsigned long get_board_ddr_clk(void); #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 +#define QIXIS_RST_FORCE_MEM 0x01 #define CONFIG_SYS_CSPR3_EXT (0xf) #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) \ @@ -248,7 +249,7 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ FTIM1_GPCM_TRAD(0x3f)) #define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \ - FTIM2_GPCM_TCH(0x0) | \ + FTIM2_GPCM_TCH(0x8) | \ FTIM2_GPCM_TWP(0x1f)) #define CONFIG_SYS_CS3_FTIM3 0x0 |