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| author | Patrick Delaunay <patrick.delaunay@st.com> | 2019-02-04 11:26:22 +0100 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@st.com> | 2019-04-12 16:09:13 +0200 |
| commit | 31e45a1a9ea07a9c36ada6401e4631a765398c75 (patch) | |
| tree | 5ea69378d77f91d367bac38b5243fc5a291dbb15 /include/power | |
| parent | c8a6668cbdc0644330135b7016ffa3ea74895e64 (diff) | |
| download | u-boot-31e45a1a9ea07a9c36ada6401e4631a765398c75.tar.gz u-boot-31e45a1a9ea07a9c36ada6401e4631a765398c75.tar.bz2 u-boot-31e45a1a9ea07a9c36ada6401e4631a765398c75.zip | |
stpmic1: add NVM update support in fuse command
Add functions to read/update the non volatile memory of STPMIC1
(8 bytes-register at 0xF8 address) and allow access
with fuse command (bank=1, word > 0xF8).
For example:
STM32MP> fuse read 1 0xf8 8
Reading bank 1:
Word 0x000000f8: 000000ee 00000092 000000c0 00000002
Word 0x000000fc: 000000f2 00000080 00000002 00000033
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'include/power')
| -rw-r--r-- | include/power/stpmic1.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index ea91b75cfd..0e6721d852 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -107,4 +107,11 @@ enum { STPMIC1_PWR_SW2, STPMIC1_MAX_PWR_SW, }; + +int stpmic1_shadow_read_byte(u8 addr, u8 *buf); +int stpmic1_shadow_write_byte(u8 addr, u8 *buf); +int stpmic1_nvm_read_byte(u8 addr, u8 *buf); +int stpmic1_nvm_write_byte(u8 addr, u8 *buf); +int stpmic1_nvm_read_all(u8 *buf, int buf_len); +int stpmic1_nvm_write_all(u8 *buf, int buf_len); #endif |