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| author | Simon Glass <sjg@chromium.org> | 2014-11-14 18:18:30 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-25 06:34:00 -0700 |
| commit | e8a552eb625f0b2d7a778d151af25a17c6d33b7b (patch) | |
| tree | 07c3af027137623dbb431e2b913d64e11cfc2fdd /include/pci.h | |
| parent | b6b4a0ec5550cf5e45e9b0b3527db63464e4c3d8 (diff) | |
| download | u-boot-e8a552eb625f0b2d7a778d151af25a17c6d33b7b.tar.gz u-boot-e8a552eb625f0b2d7a778d151af25a17c6d33b7b.tar.bz2 u-boot-e8a552eb625f0b2d7a778d151af25a17c6d33b7b.zip | |
pci: Add functions to read and write a BAR address
Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'include/pci.h')
| -rw-r--r-- | include/pci.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/include/pci.h b/include/pci.h index d211351e44..216f4489e5 100644 --- a/include/pci.h +++ b/include/pci.h @@ -678,5 +678,28 @@ extern void pci_mpc824x_init (struct pci_controller *hose); extern void pci_mpc85xx_init (struct pci_controller *hose); #endif +/** + * pci_write_bar32() - Write the address of a BAR including control bits + * + * This writes a raw address (with control bits) to a bar + * + * @hose: PCI hose to use + * @dev: PCI device to update + * @barnum: BAR number (0-5) + * @addr: BAR address with control bits + */ +void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum, + u32 addr_and_ctrl); + +/** + * pci_read_bar32() - read the address of a bar + * + * @hose: PCI hose to use + * @dev: PCI device to inspect + * @barnum: BAR number (0-5) + * @return address of the bar, masking out any control bits + * */ +u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum); + #endif /* __ASSEMBLY__ */ #endif /* _PCI_H */ |