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| author | Pali Rohár <pali@kernel.org> | 2021-11-26 11:42:44 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-01-12 14:21:24 -0500 |
| commit | f146bd96e448200d05261e92738812ca6e37c372 (patch) | |
| tree | 15bcca4b4c5b671384137fe052ed588e6fe7a990 /include/msc01.h | |
| parent | 247ffc6b36ac2605d54fe31628ae6b827603d0ac (diff) | |
| download | u-boot-f146bd96e448200d05261e92738812ca6e37c372.tar.gz u-boot-f146bd96e448200d05261e92738812ca6e37c372.tar.bz2 u-boot-f146bd96e448200d05261e92738812ca6e37c372.zip | |
pci: msc01: Use PCI_CONF1_ADDRESS() macro
PCI msc01 driver uses standard format of Config Address for PCI
Configuration Mechanism #1 but with cleared Enable bit.
So use new U-Boot macro PCI_CONF1_ADDRESS() with clearing PCI_CONF1_ENABLE
bit and remove old custom driver address macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include/msc01.h')
| -rw-r--r-- | include/msc01.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/include/msc01.h b/include/msc01.h index ec18a724eb..2015812349 100644 --- a/include/msc01.h +++ b/include/msc01.h @@ -71,15 +71,6 @@ #define MSC01_PCI_INTSTAT_MA_SHF 7 #define MSC01_PCI_INTSTAT_MA_MSK (0x1 << MSC01_PCI_INTSTAT_MA_SHF) -#define MSC01_PCI_CFGADDR_BNUM_SHF 16 -#define MSC01_PCI_CFGADDR_BNUM_MSK (0xff << MSC01_PCI_CFGADDR_BNUM_SHF) -#define MSC01_PCI_CFGADDR_DNUM_SHF 11 -#define MSC01_PCI_CFGADDR_DNUM_MSK (0x1f << MSC01_PCI_CFGADDR_DNUM_SHF) -#define MSC01_PCI_CFGADDR_FNUM_SHF 8 -#define MSC01_PCI_CFGADDR_FNUM_MSK (0x3 << MSC01_PCI_CFGADDR_FNUM_SHF) -#define MSC01_PCI_CFGADDR_RNUM_SHF 2 -#define MSC01_PCI_CFGADDR_RNUM_MSK (0x3f << MSC01_PCI_CFGADDR_RNUM_SHF) - #define MSC01_PCI_HEAD0_VENDORID_SHF 0 #define MSC01_PCI_HEAD0_DEVICEID_SHF 16 |