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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2016-08-02 19:03:26 +0800 |
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committer | York Sun <york.sun@nxp.com> | 2016-09-14 14:07:08 -0700 |
commit | 664b6520582fcea7e150f57258c7a63627837318 (patch) | |
tree | 12d0456f8dfe80a95eb52f1209d39c1c24f86f50 /include/fsl_csu.h | |
parent | c37fdbdbb0dd65cb4aa147c9cf9352901014be3b (diff) | |
download | u-boot-664b6520582fcea7e150f57258c7a63627837318.tar.gz u-boot-664b6520582fcea7e150f57258c7a63627837318.tar.bz2 u-boot-664b6520582fcea7e150f57258c7a63627837318.zip |
fsl: csu: add an API to set R/W permission to PCIe
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/fsl_csu.h')
-rw-r--r-- | include/fsl_csu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fsl_csu.h b/include/fsl_csu.h index 57a99859ee..8582ac0774 100644 --- a/include/fsl_csu.h +++ b/include/fsl_csu.h @@ -31,5 +31,6 @@ struct csu_ns_dev { void enable_layerscape_ns_access(void); void set_devices_ns_access(struct csu_ns_dev *ns_dev, u16 val); +void set_pcie_ns_access(int pcie, u16 val); #endif |