diff options
| author | Patrice Chotard <patrice.chotard@st.com> | 2017-11-15 13:14:52 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-11-29 22:30:50 -0500 |
| commit | 4e97e25723530cc8bf57ca1d0ae17d86895e04c5 (patch) | |
| tree | 776fe7bae3a58cde68b6b024427436d41c22dfa1 /include/dt-bindings | |
| parent | 928954fe58e69767b138816ab58e1a7e48f2c685 (diff) | |
| download | u-boot-4e97e25723530cc8bf57ca1d0ae17d86895e04c5.tar.gz u-boot-4e97e25723530cc8bf57ca1d0ae17d86895e04c5.tar.bz2 u-boot-4e97e25723530cc8bf57ca1d0ae17d86895e04c5.zip | |
clk: clk_stm32fx: add clock configuration for mmc usage
MMC block needs 48Mhz source clock, for that we choose
to select the SAI PLL.
Update also stm32_clock_get_rate() to retrieve the MMC
clock source needed in MMC driver.
STM32F4 uses a different RCC variant than STM32F7. For STM32F4
sdmmc clocks bit are located into dckcfgr register whereas there
are located into dckcfgr2 registers on STM32F7.
In both registers, bits CK48MSEL and SDMMC1SEL are located at
the same position.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/mfd/stm32f7-rcc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/mfd/stm32f7-rcc.h b/include/dt-bindings/mfd/stm32f7-rcc.h index e36cc69959..44c0914493 100644 --- a/include/dt-bindings/mfd/stm32f7-rcc.h +++ b/include/dt-bindings/mfd/stm32f7-rcc.h @@ -90,6 +90,7 @@ #define STM32F7_RCC_APB2_TIM8 1 #define STM32F7_RCC_APB2_USART1 4 #define STM32F7_RCC_APB2_USART6 5 +#define STM32F7_RCC_APB2_SDMMC2 7 #define STM32F7_RCC_APB2_ADC1 8 #define STM32F7_RCC_APB2_ADC2 9 #define STM32F7_RCC_APB2_ADC3 10 |