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| author | Heiko Stuebner <heiko.stuebner@cherry.de> | 2024-06-10 15:13:32 +0200 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2024-06-14 17:13:35 +0800 |
| commit | d09cd18aedd9fb2abcb6f3003375f680e28ae104 (patch) | |
| tree | 53c1a37bd1d138d4a4986473ef9b049097ac97c2 /dts | |
| parent | a764eb156a06fd8ab073bdaa86df41b4ed3c5209 (diff) | |
| download | u-boot-d09cd18aedd9fb2abcb6f3003375f680e28ae104.tar.gz u-boot-d09cd18aedd9fb2abcb6f3003375f680e28ae104.tar.bz2 u-boot-d09cd18aedd9fb2abcb6f3003375f680e28ae104.zip | |
arm64: dts: rockchip: move uart2 pinmux to dtsi on rk3588-tiger
The association of uart2 to the q7-uart pins is part of the module
itself and not the baseboard used. Therefore move the pinctrl over
to the tiger dtsi.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240422143356.2596414-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[ upstream commit: 5adbad5c464a708a87cf5ade1bfe2ca947bb2f82 ]
(cherry picked from commit f8314a4fbc00a3d651a7e9b4d9462d10c6c02a12)
Diffstat (limited to 'dts')
| -rw-r--r-- | dts/upstream/src/arm64/rockchip/rk3588-tiger-haikou.dts | 1 | ||||
| -rw-r--r-- | dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi | 5 |
2 files changed, 5 insertions, 1 deletions
diff --git a/dts/upstream/src/arm64/rockchip/rk3588-tiger-haikou.dts b/dts/upstream/src/arm64/rockchip/rk3588-tiger-haikou.dts index d672198c6b..9bdd14799e 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-tiger-haikou.dts +++ b/dts/upstream/src/arm64/rockchip/rk3588-tiger-haikou.dts @@ -231,7 +231,6 @@ }; &uart2 { - pinctrl-0 = <&uart2m2_xfer>; status = "okay"; }; diff --git a/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi b/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi index 72fe696b00..4984e36a8c 100644 --- a/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi +++ b/dts/upstream/src/arm64/rockchip/rk3588-tiger.dtsi @@ -688,6 +688,11 @@ status = "okay"; }; +/* Routed to UART0 on the Q7 connector */ +&uart2 { + pinctrl-0 = <&uart2m2_xfer>; +}; + /* Mule-ATtiny UPDI */ &uart4 { pinctrl-0 = <&uart4m2_xfer>; |