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authorSimon Glass <sjg@chromium.org>2019-12-06 21:42:42 -0700
committerBin Meng <bmeng.cn@gmail.com>2019-12-15 11:44:22 +0800
commit75214b051bfbbdafa5134b4320b9e4ae6ee9b22d (patch)
tree7f5482d4229c448a2d6d8b2fbffea7f4298cb7ae /drivers
parenta550662c270eb66b373498dae0cea2456fb30e22 (diff)
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spi: ich: Add mmio_base to struct ich_spi_platdata
It is useful to store the mmio base in platdata. It reduces the amount of casting needed. Update the code and move the struct to the C file at the same time, as we will need to use with of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/ich.c27
-rw-r--r--drivers/spi/ich.h5
2 files changed, 13 insertions, 19 deletions
diff --git a/drivers/spi/ich.c b/drivers/spi/ich.c
index b83dfb854d..08c37ca4ab 100644
--- a/drivers/spi/ich.c
+++ b/drivers/spi/ich.c
@@ -27,6 +27,12 @@
#define debug_trace(x, args...)
#endif
+struct ich_spi_platdata {
+ enum ich_version ich_version; /* Controller version, 7 or 9 */
+ bool lockdown; /* lock down controller settings? */
+ ulong mmio_base; /* Base of MMIO registers */
+};
+
static u8 ich_readb(struct ich_spi_priv *priv, int reg)
{
u8 value = readb(priv->base + reg);
@@ -467,16 +473,9 @@ static int ich_init_controller(struct udevice *dev,
struct ich_spi_platdata *plat,
struct ich_spi_priv *ctlr)
{
- ulong sbase_addr;
- void *sbase;
-
- /* SBASE is similar */
- pch_get_spi_base(dev->parent, &sbase_addr);
- sbase = (void *)sbase_addr;
- debug("%s: sbase=%p\n", __func__, sbase);
-
+ ctlr->base = (void *)plat->mmio_base;
if (plat->ich_version == ICHV_7) {
- struct ich7_spi_regs *ich7_spi = sbase;
+ struct ich7_spi_regs *ich7_spi = ctlr->base;
ctlr->opmenu = offsetof(struct ich7_spi_regs, opmenu);
ctlr->menubytes = sizeof(ich7_spi->opmenu);
@@ -488,9 +487,8 @@ static int ich_init_controller(struct udevice *dev,
ctlr->control = offsetof(struct ich7_spi_regs, spic);
ctlr->bbar = offsetof(struct ich7_spi_regs, bbar);
ctlr->preop = offsetof(struct ich7_spi_regs, preop);
- ctlr->base = ich7_spi;
} else if (plat->ich_version == ICHV_9) {
- struct ich9_spi_regs *ich9_spi = sbase;
+ struct ich9_spi_regs *ich9_spi = ctlr->base;
ctlr->opmenu = offsetof(struct ich9_spi_regs, opmenu);
ctlr->menubytes = sizeof(ich9_spi->opmenu);
@@ -505,7 +503,6 @@ static int ich_init_controller(struct udevice *dev,
ctlr->preop = offsetof(struct ich9_spi_regs, preop);
ctlr->bcr = offsetof(struct ich9_spi_regs, bcr);
ctlr->pr = &ich9_spi->pr[0];
- ctlr->base = ich9_spi;
} else {
debug("ICH SPI: Unrecognised ICH version %d\n",
plat->ich_version);
@@ -516,8 +513,8 @@ static int ich_init_controller(struct udevice *dev,
ctlr->max_speed = 20000000;
if (plat->ich_version == ICHV_9 && ich9_can_do_33mhz(dev))
ctlr->max_speed = 33000000;
- debug("ICH SPI: Version ID %d detected at %p, speed %ld\n",
- plat->ich_version, ctlr->base, ctlr->max_speed);
+ debug("ICH SPI: Version ID %d detected at %lx, speed %ld\n",
+ plat->ich_version, plat->mmio_base, ctlr->max_speed);
ich_set_bbar(ctlr, 0);
@@ -605,6 +602,8 @@ static int ich_spi_ofdata_to_platdata(struct udevice *dev)
plat->ich_version = dev_get_driver_data(dev);
plat->lockdown = dev_read_bool(dev, "intel,spi-lock-down");
+ pch_get_spi_base(priv->pch, &plat->mmio_base);
+
return 0;
}
diff --git a/drivers/spi/ich.h b/drivers/spi/ich.h
index 77057878a5..623b2c547a 100644
--- a/drivers/spi/ich.h
+++ b/drivers/spi/ich.h
@@ -168,11 +168,6 @@ enum ich_version {
ICHV_9,
};
-struct ich_spi_platdata {
- enum ich_version ich_version; /* Controller version, 7 or 9 */
- bool lockdown; /* lock down controller settings? */
-};
-
struct ich_spi_priv {
int opmenu;
int menubytes;