diff options
author | Tom Rini <trini@ti.com> | 2014-11-13 10:35:13 -0500 |
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committer | Tom Rini <trini@ti.com> | 2014-11-13 10:35:13 -0500 |
commit | 0d485b9095328cdc81b2ee94ff59b988c69b9127 (patch) | |
tree | 93406f5dfe78b0b5670272a9de3f3eb3ee419785 /drivers/usb | |
parent | 3ad207a2bf1399a689233a97978e306f71729f77 (diff) | |
parent | 64a97599b79e277600bc6f1b22cf48aa04ee9bd0 (diff) | |
download | u-boot-0d485b9095328cdc81b2ee94ff59b988c69b9127.tar.gz u-boot-0d485b9095328cdc81b2ee94ff59b988c69b9127.tar.bz2 u-boot-0d485b9095328cdc81b2ee94ff59b988c69b9127.zip |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Diffstat (limited to 'drivers/usb')
-rw-r--r-- | drivers/usb/host/ehci-sunxi.c | 80 |
1 files changed, 54 insertions, 26 deletions
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c index 4befd57454..cc9a8fa71e 100644 --- a/drivers/usb/host/ehci-sunxi.c +++ b/drivers/usb/host/ehci-sunxi.c @@ -10,16 +10,14 @@ */ #include <asm/arch/clock.h> +#include <asm/arch/cpu.h> #include <asm/gpio.h> #include <asm/io.h> #include <common.h> #include "ehci.h" -#define SUNXI_USB1_IO_BASE 0x01c14000 -#define SUNXI_USB2_IO_BASE 0x01c1c000 - #define SUNXI_USB_PMU_IRQ_ENABLE 0x800 -#define SUNXI_USB_CSR 0x01c13404 +#define SUNXI_USB_CSR 0x404 #define SUNXI_USB_PASSBY_EN 1 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) @@ -32,25 +30,28 @@ static struct sunxi_ehci_hcd { int usb_rst_mask; int ahb_clk_mask; int gpio_vbus; - void *csr; int irq; int id; } sunxi_echi_hcd[] = { { - .usb_rst_mask = CCM_USB_CTRL_PHY1_RST, + .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK, .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0, - .gpio_vbus = CONFIG_SUNXI_USB_VBUS0_GPIO, - .csr = (void *)SUNXI_USB_CSR, +#ifndef CONFIG_MACH_SUN6I .irq = 39, +#else + .irq = 72, +#endif .id = 1, }, #if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1) { - .usb_rst_mask = CCM_USB_CTRL_PHY2_RST, + .usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK, .ahb_clk_mask = 1 << AHB_GATE_OFFSET_USB_EHCI1, - .gpio_vbus = CONFIG_SUNXI_USB_VBUS1_GPIO, - .csr = (void *)SUNXI_USB_CSR, +#ifndef CONFIG_MACH_SUN6I .irq = 40, +#else + .irq = 74, +#endif .id = 2, } #endif @@ -60,19 +61,32 @@ static int enabled_hcd_count; static void *get_io_base(int hcd_id) { - if (hcd_id == 1) - return (void *)SUNXI_USB1_IO_BASE; - else if (hcd_id == 2) - return (void *)SUNXI_USB2_IO_BASE; - else + switch (hcd_id) { + case 0: + return (void *)SUNXI_USB0_BASE; + case 1: + return (void *)SUNXI_USB1_BASE; + case 2: + return (void *)SUNXI_USB2_BASE; + default: return NULL; + } +} + +static int get_vbus_gpio(int hcd_id) +{ + switch (hcd_id) { + case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN); + case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN); + } + return -1; } static void usb_phy_write(struct sunxi_ehci_hcd *sunxi_ehci, int addr, int data, int len) { int j = 0, usbc_bit = 0; - void *dest = sunxi_ehci->csr; + void *dest = get_io_base(0) + SUNXI_USB_CSR; usbc_bit = 1 << (sunxi_ehci->id * 2); for (j = 0; j < len; j++) { @@ -105,7 +119,7 @@ static void sunxi_usb_phy_init(struct sunxi_ehci_hcd *sunxi_ehci) usb_phy_write(sunxi_ehci, 0x20, 0x14, 5); /* threshold adjustment disconnect */ -#ifdef CONFIG_MACH_SUN4I +#if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN6I usb_phy_write(sunxi_ehci, 0x2a, 3, 2); #else usb_phy_write(sunxi_ehci, 0x2a, 2, 2); @@ -138,22 +152,30 @@ static void sunxi_ehci_enable(struct sunxi_ehci_hcd *sunxi_ehci) setbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask); setbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask); +#ifdef CONFIG_MACH_SUN6I + setbits_le32(&ccm->ahb_reset0_cfg, sunxi_ehci->ahb_clk_mask); +#endif sunxi_usb_phy_init(sunxi_ehci); sunxi_usb_passby(sunxi_ehci, SUNXI_USB_PASSBY_EN); - gpio_direction_output(sunxi_ehci->gpio_vbus, 1); + if (sunxi_ehci->gpio_vbus != -1) + gpio_direction_output(sunxi_ehci->gpio_vbus, 1); } static void sunxi_ehci_disable(struct sunxi_ehci_hcd *sunxi_ehci) { struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - gpio_direction_output(sunxi_ehci->gpio_vbus, 0); + if (sunxi_ehci->gpio_vbus != -1) + gpio_direction_output(sunxi_ehci->gpio_vbus, 0); sunxi_usb_passby(sunxi_ehci, !SUNXI_USB_PASSBY_EN); +#ifdef CONFIG_MACH_SUN6I + clrbits_le32(&ccm->ahb_reset0_cfg, sunxi_ehci->ahb_clk_mask); +#endif clrbits_le32(&ccm->ahb_gate0, sunxi_ehci->ahb_clk_mask); clrbits_le32(&ccm->usb_clk_cfg, sunxi_ehci->usb_rst_mask); } @@ -165,13 +187,17 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr, struct sunxi_ehci_hcd *sunxi_ehci = &sunxi_echi_hcd[index]; int err; + sunxi_ehci->gpio_vbus = get_vbus_gpio(sunxi_ehci->id); + /* enable common PHY only once */ if (index == 0) setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE); - err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus"); - if (err) - return err; + if (sunxi_ehci->gpio_vbus != -1) { + err = gpio_request(sunxi_ehci->gpio_vbus, "ehci_vbus"); + if (err) + return err; + } sunxi_ehci_enable(sunxi_ehci); @@ -197,9 +223,11 @@ int ehci_hcd_stop(int index) sunxi_ehci_disable(sunxi_ehci); - err = gpio_free(sunxi_ehci->gpio_vbus); - if (err) - return err; + if (sunxi_ehci->gpio_vbus != -1) { + err = gpio_free(sunxi_ehci->gpio_vbus); + if (err) + return err; + } /* disable common PHY only once, for the last enabled hcd */ if (enabled_hcd_count == 1) |