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authorAndre Przywara <andre.przywara@arm.com>2022-10-05 23:19:54 +0100
committerAndre Przywara <andre.przywara@arm.com>2022-10-19 14:15:02 +0100
commit843ed983a07ee5d8d4e4ac5baa39fc53f12b5f33 (patch)
tree2380b564b3db29540e5fdf9373dcd1c47deba812 /drivers/pinctrl
parentb87fb196688b055383e3a44c40d87afe5c395a09 (diff)
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suniv: add UART1 support
Some boards with the Allwinner F1C100s family SoCs use UART1 for its debug UART, so define the pins for the SPL and the pinmux name and mux value for U-Boot proper. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 9ce2bc1b3a..061104be05 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -245,6 +245,7 @@ static const struct sunxi_pinctrl_function suniv_f1c100s_pinctrl_functions[] = {
#else
{ "uart0", 5 }, /* PE0-PE1 */
#endif
+ { "uart1", 5 }, /* PA0-PA3 */
};
static const struct sunxi_pinctrl_desc __maybe_unused suniv_f1c100s_pinctrl_desc = {