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author | Simon Glass <sjg@chromium.org> | 2019-12-06 21:42:53 -0700 |
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committer | Bin Meng <bmeng.cn@gmail.com> | 2019-12-15 11:44:25 +0800 |
commit | 74749f1e84dfec4ba521d741db461803d465948c (patch) | |
tree | e71a8c20cf6f4381598b193611c382264f23beb2 /drivers/pinctrl/Makefile | |
parent | b84d4d0932ddbd80416368f5ccdadee34f74b968 (diff) | |
download | u-boot-74749f1e84dfec4ba521d741db461803d465948c.tar.gz u-boot-74749f1e84dfec4ba521d741db461803d465948c.tar.bz2 u-boot-74749f1e84dfec4ba521d741db461803d465948c.zip |
x86: Add a generic Intel pinctrl driver
Recent Intel SoCs share a pinctrl mechanism with many common elements. Add
an implementation of this core functionality, allowing SoC-specific
drivers to avoid adding common code.
As well as a pinctrl driver this provides a GPIO driver based on the same
code.
Once other SoCs use this driver we may consider moving more properties to
the device tree (e.g. the community info and pad definitions).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/pinctrl/Makefile')
-rw-r--r-- | drivers/pinctrl/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index ce0879a2b7..4f662c4f6d 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -9,6 +9,7 @@ obj-y += nxp/ obj-$(CONFIG_$(SPL_)PINCTRL_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-$(CONFIG_ARCH_ATH79) += ath79/ +obj-$(CONFIG_PINCTRL_INTEL) += intel/ obj-$(CONFIG_ARCH_MTMIPS) += mtmips/ obj-$(CONFIG_ARCH_RMOBILE) += renesas/ obj-$(CONFIG_PINCTRL_SANDBOX) += pinctrl-sandbox.o |