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| author | Simon Glass <sjg@chromium.org> | 2014-11-14 18:18:30 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2014-11-25 06:34:00 -0700 |
| commit | e8a552eb625f0b2d7a778d151af25a17c6d33b7b (patch) | |
| tree | 07c3af027137623dbb431e2b913d64e11cfc2fdd /drivers/pci | |
| parent | b6b4a0ec5550cf5e45e9b0b3527db63464e4c3d8 (diff) | |
| download | u-boot-e8a552eb625f0b2d7a778d151af25a17c6d33b7b.tar.gz u-boot-e8a552eb625f0b2d7a778d151af25a17c6d33b7b.tar.bz2 u-boot-e8a552eb625f0b2d7a778d151af25a17c6d33b7b.zip | |
pci: Add functions to read and write a BAR address
Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci.c | 24 |
1 files changed, 21 insertions, 3 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 7ee21d1c1d..3daf73c30a 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -366,9 +366,27 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, return phys_addr; } -/* - * - */ +void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum, + u32 addr_and_ctrl) +{ + int bar; + + bar = PCI_BASE_ADDRESS_0 + barnum * 4; + pci_hose_write_config_dword(hose, dev, bar, addr_and_ctrl); +} + +u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum) +{ + u32 addr; + int bar; + + bar = PCI_BASE_ADDRESS_0 + barnum * 4; + pci_hose_read_config_dword(hose, dev, bar, &addr); + if (addr & PCI_BASE_ADDRESS_SPACE_IO) + return addr & PCI_BASE_ADDRESS_IO_MASK; + else + return addr & PCI_BASE_ADDRESS_MEM_MASK; +} int pci_hose_config_device(struct pci_controller *hose, pci_dev_t dev, |