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| author | Tom Rini <trini@konsulko.com> | 2021-01-06 07:57:33 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-01-06 07:57:33 -0500 |
| commit | bc0b99bd8b19599f670f42401de655fa9b44cd94 (patch) | |
| tree | 8f5294dc16657c32b1a401c13a1f2a0579ac62e2 /drivers/mtd/nand | |
| parent | b11f634b1c1be6ab419758c6596c673445e5ac70 (diff) | |
| parent | 0109db1cd1e63b35c1c84d6bc2ccaa26aa6b7ce3 (diff) | |
| download | u-boot-bc0b99bd8b19599f670f42401de655fa9b44cd94.tar.gz u-boot-bc0b99bd8b19599f670f42401de655fa9b44cd94.tar.bz2 u-boot-bc0b99bd8b19599f670f42401de655fa9b44cd94.zip | |
Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.04
arm64:
- DT updates
microblaze:
- Add support for NOR device support
spi:
- Fix unaligned data write issue
nand:
- Minor code change
xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards
video:
- Add support for seps525 spi display
tools:
- Minor Vitis file support
cmd/common
- Minor code indentation fixes
serial:
- Uartlite debug uart initialization fix
Diffstat (limited to 'drivers/mtd/nand')
| -rw-r--r-- | drivers/mtd/nand/raw/zynq_nand.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/mtd/nand/raw/zynq_nand.c b/drivers/mtd/nand/raw/zynq_nand.c index 15d4a238e6..d792528370 100644 --- a/drivers/mtd/nand/raw/zynq_nand.c +++ b/drivers/mtd/nand/raw/zynq_nand.c @@ -1206,12 +1206,10 @@ static int zynq_nand_probe(struct udevice *dev) nand_chip->options |= NAND_SUBPAGE_READ; /* On-Die ECC spare bytes offset 8 is used for ECC codes */ - if (ondie_ecc_enabled) { - nand_chip->ecc.layout = &ondie_nand_oob_64; - /* Use the BBT pattern descriptors */ - nand_chip->bbt_td = &bbt_main_descr; - nand_chip->bbt_md = &bbt_mirror_descr; - } + nand_chip->ecc.layout = &ondie_nand_oob_64; + /* Use the BBT pattern descriptors */ + nand_chip->bbt_td = &bbt_main_descr; + nand_chip->bbt_md = &bbt_mirror_descr; } else { /* Hardware ECC generates 3 bytes ECC code for each 512 bytes */ nand_chip->ecc.mode = NAND_ECC_HW; |