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| author | Jagan Teki <jagan@amarulasolutions.com> | 2019-02-28 00:26:49 +0530 |
|---|---|---|
| committer | Jagan Teki <jagan@amarulasolutions.com> | 2019-03-09 13:16:35 +0530 |
| commit | 3d83c4a1d4dd7ea230d5b5c073e503dca883e409 (patch) | |
| tree | 2c75fe150233b41cd7792364ef8d36e38d6e2e72 /drivers/clk/sunxi | |
| parent | b24db49cc2be5c0287f8ee5257b84f98323048c4 (diff) | |
| download | u-boot-3d83c4a1d4dd7ea230d5b5c073e503dca883e409.tar.gz u-boot-3d83c4a1d4dd7ea230d5b5c073e503dca883e409.tar.bz2 u-boot-3d83c4a1d4dd7ea230d5b5c073e503dca883e409.zip | |
clk: sunxi: Implement A10 EMAC clocks
Implement EMAC clocks via ccu_clk_gate for Allwinner A10 SoC.
Which would eventually used in sunxi_emac.c driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'drivers/clk/sunxi')
| -rw-r--r-- | drivers/clk/sunxi/clk_a10.c | 1 | ||||
| -rw-r--r-- | drivers/clk/sunxi/clk_a10s.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/sunxi/clk_a10.c b/drivers/clk/sunxi/clk_a10.c index b8b57e2b31..15ffe5ecb3 100644 --- a/drivers/clk/sunxi/clk_a10.c +++ b/drivers/clk/sunxi/clk_a10.c @@ -22,6 +22,7 @@ static struct ccu_clk_gate a10_gates[] = { [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), [CLK_AHB_MMC3] = GATE(0x060, BIT(11)), + [CLK_AHB_EMAC] = GATE(0x060, BIT(17)), [CLK_AHB_SPI0] = GATE(0x060, BIT(20)), [CLK_AHB_SPI1] = GATE(0x060, BIT(21)), [CLK_AHB_SPI2] = GATE(0x060, BIT(22)), diff --git a/drivers/clk/sunxi/clk_a10s.c b/drivers/clk/sunxi/clk_a10s.c index c6fcede822..33d41d47b0 100644 --- a/drivers/clk/sunxi/clk_a10s.c +++ b/drivers/clk/sunxi/clk_a10s.c @@ -19,6 +19,7 @@ static struct ccu_clk_gate a10s_gates[] = { [CLK_AHB_MMC0] = GATE(0x060, BIT(8)), [CLK_AHB_MMC1] = GATE(0x060, BIT(9)), [CLK_AHB_MMC2] = GATE(0x060, BIT(10)), + [CLK_AHB_EMAC] = GATE(0x060, BIT(17)), [CLK_AHB_SPI0] = GATE(0x060, BIT(20)), [CLK_AHB_SPI1] = GATE(0x060, BIT(21)), [CLK_AHB_SPI2] = GATE(0x060, BIT(22)), |