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author | Tom Rini <trini@konsulko.com> | 2023-03-27 15:19:57 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2023-03-27 15:19:57 -0400 |
commit | 605bc145f91d2a28ba2e517cae4e53e255e34b6f (patch) | |
tree | a8df36d6569d441bc013399ff7dafff07cd36657 /doc | |
parent | fde439219ff53a46bdd5dff69e049ccd4be57310 (diff) | |
parent | 41a88ad529b3943b1e465846eb24fe2c29203e35 (diff) | |
download | u-boot-605bc145f91d2a28ba2e517cae4e53e255e34b6f.tar.gz u-boot-605bc145f91d2a28ba2e517cae4e53e255e34b6f.tar.bz2 u-boot-605bc145f91d2a28ba2e517cae4e53e255e34b6f.zip |
Merge branch 'master' into next
Diffstat (limited to 'doc')
-rw-r--r-- | doc/README.mpc85xx-sd-spi-boot | 2 | ||||
-rw-r--r-- | doc/board/intel/minnowmax.rst | 15 | ||||
-rw-r--r-- | doc/develop/release_cycle.rst | 2 |
3 files changed, 15 insertions, 4 deletions
diff --git a/doc/README.mpc85xx-sd-spi-boot b/doc/README.mpc85xx-sd-spi-boot index 329de4e6c4..7608fc3aac 100644 --- a/doc/README.mpc85xx-sd-spi-boot +++ b/doc/README.mpc85xx-sd-spi-boot @@ -14,7 +14,7 @@ Where to get boot_format: ======================== you can browse it online at: -https://source.codeaurora.org/external/qoriq/qoriq-yocto-sdk/boot-format +https://github.com/nxp-qoriq-yocto-sdk/boot-format Building ======== diff --git a/doc/board/intel/minnowmax.rst b/doc/board/intel/minnowmax.rst index 1ba25b50d2..d0286bd993 100644 --- a/doc/board/intel/minnowmax.rst +++ b/doc/board/intel/minnowmax.rst @@ -54,9 +54,9 @@ Offset Description Controlling config 000000 descriptor.bin Hard-coded to 0 in ifdtool 001000 me.bin Set by the descriptor 500000 <spare> +5f0000 MRC cache CONFIG_ENABLE_MRC_CACHE +600000 u-boot-dtb.bin CONFIG_TEXT_BASE 6ef000 Environment CONFIG_ENV_OFFSET -6f0000 MRC cache CONFIG_ENABLE_MRC_CACHE -700000 u-boot-dtb.bin CONFIG_TEXT_BASE 7b0000 vga.bin CONFIG_VGA_BIOS_ADDR 7c0000 fsp.bin CONFIG_FSP_ADDR 7f8000 <spare> (depends on size of fsp.bin) @@ -68,3 +68,14 @@ Overall ROM image size is controlled by CONFIG_ROM_SIZE. Note that the debug version of the FSP is bigger in size. If this version is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of the default value 0xfffc0000. + +If you want to change CONFIG_TEXT_BASE from the current value of ffe00000 +you need to check a few other things. CONFIG_SYS_MONITOR_BASE should +automatically update to be the same as CONFIG_TEXT_BASE but +CONFIG_SYS_MONITOR_LEN may need to be adjusted too. It must cover the space +from the start of U-Boot to the end of the RAM, since the 16-bit boot needs to +be able to jump to U-Boot. See the end of arch/x86/lib/fsp1/fsp_car.S which +has these values. + +Also check the MRC cache address in the devicetree ("rw-mrc-cache"). It must +not overlap with U-Boot. diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 7634e3dc9c..ea584cef21 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -72,7 +72,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2023.04-rc4 was released on Mon 13 March 2023. -.. * U-Boot v2023.04-rc5 was released on Mon 27 March 2023. +* U-Boot v2023.04-rc5 was released on Mon 27 March 2023. Please note that the following dates are planned only and may be deviated from as needed. |