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author | Tom Rini <trini@konsulko.com> | 2022-07-14 07:18:33 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2022-07-14 07:18:33 -0400 |
commit | 58f3dc5c4eac9c6050edda6af2e37d20a2f9586d (patch) | |
tree | 78f091f787b36104ea2e2e42fee9b335a7915daa /doc | |
parent | 854d6de6107bca044db362612f39691f4f5395ca (diff) | |
parent | dd6bf539e88aff1b8caeeccbe9af59b2191a178b (diff) | |
download | u-boot-58f3dc5c4eac9c6050edda6af2e37d20a2f9586d.tar.gz u-boot-58f3dc5c4eac9c6050edda6af2e37d20a2f9586d.tar.bz2 u-boot-58f3dc5c4eac9c6050edda6af2e37d20a2f9586d.zip |
Merge tag 'mips-pull-2022-07-13' of https://source.denx.de/u-boot/custodians/u-boot-mips
- MIPS: add drivers and board support for Mediatek MT7621 SoC
Diffstat (limited to 'doc')
-rw-r--r-- | doc/board/index.rst | 1 | ||||
-rw-r--r-- | doc/board/mediatek/index.rst | 9 | ||||
-rw-r--r-- | doc/board/mediatek/mt7621.rst | 48 |
3 files changed, 58 insertions, 0 deletions
diff --git a/doc/board/index.rst b/doc/board/index.rst index f90a9cad45..01b99f9cf5 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -23,6 +23,7 @@ Board-specific doc highbank/index intel/index kontron/index + mediatek/index microchip/index nokia/index nxp/index diff --git a/doc/board/mediatek/index.rst b/doc/board/mediatek/index.rst new file mode 100644 index 0000000000..38cd8cb5b2 --- /dev/null +++ b/doc/board/mediatek/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Mediatek +========= + +.. toctree:: + :maxdepth: 2 + + mt7621 diff --git a/doc/board/mediatek/mt7621.rst b/doc/board/mediatek/mt7621.rst new file mode 100644 index 0000000000..1662255546 --- /dev/null +++ b/doc/board/mediatek/mt7621.rst @@ -0,0 +1,48 @@ +.. SPDX-License-Identifier: GPL-2.0 + +mt7621_rfb/mt7621_nand_rfb +========================== + +U-Boot for the MediaTek MT7621 boards + +Quick Start +----------- + +- Get the DDR initialization binary blob +- Configure CPU and DDR parameters +- Build U-Boot + +Get the DDR initialization binary blob +-------------------------------------- + +Download one from: + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram.bin + - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram_noprint.bin + +mt7621_stage_sram_noprint.bin has removed all output logs. To use this one, +download and rename it to mt7621_stage_sram.bin + +Put the binary blob to the u-boot build directory. + +Configure CPU and DDR parameters +-------------------------------- + +menuconfig > MIPS architecture > MediaTek MIPS platforms > CPU & DDR configuration + +Select the correct DDR timing parameters for your board. The size shown here +must match the DDR size of you board. + +The frequency of CPU and DDR can also be adjusted. + +Build U-Boot +------------ + +.. code-block:: bash + + $ export CROSS_COMPILE=mipsel-linux- + $ make O=build mt7621_rfb_defconfig # or mt7621_nand_rfb_defconfig + $ cp mt7621_stage_sram.bin ./build/mt7621_stage_sram.bin + $ # or cp mt7621_stage_sram_noprint.bin ./build/mt7621_stage_sram.bin + $ make O=build + +Burn the u-boot-mt7621.bin to the SPI-NOR or NAND flash. |