Merge branch 'master' of /home/stefan/git/u-boot/u-boot

12 files changed, 143 insertions, 46 deletions

diff --git a/cpu/arm1136/mx31/serial.c b/cpu/arm1136/mx31/serial.c
index 1cad8f9d8c..f498599419 100644
--- a/cpu/arm1136/mx31/serial.c
+++ b/cpu/arm1136/mx31/serial.c
@@ -63,6 +63,7 @@
 #define  URXD_FRMERR     (1<<12)
 #define  URXD_BRK        (1<<11)
 #define  URXD_PRERR      (1<<10)
+#define  URXD_RX_DATA    (0xFF)
 #define  UCR1_ADEN       (1<<15) /* Auto dectect interrupt */
 #define  UCR1_ADBR       (1<<14) /* Auto detect baud rate */
 #define  UCR1_TRDYEN     (1<<13) /* Transmitter ready interrupt enable */
@@ -165,7 +166,7 @@ void serial_setbrg (void)
 int serial_getc (void)
 {
 	while (__REG(UART_PHYS + UTS) & UTS_RXEMPTY);
-	return __REG(UART_PHYS + URXD);
+	return (__REG(UART_PHYS + URXD) & URXD_RX_DATA); /* mask out status from upper word */
 }
 
 void serial_putc (const char c)
diff --git a/cpu/at32ap/at32ap700x/gpio.c b/cpu/at32ap/at32ap700x/gpio.c
index 3da35d4fe2..56ba2f90c6 100644
--- a/cpu/at32ap/at32ap700x/gpio.c
+++ b/cpu/at32ap/at32ap700x/gpio.c
@@ -149,24 +149,27 @@ void gpio_enable_mmci(void)
 #ifdef AT32AP700x_CHIP_HAS_SPI
 void gpio_enable_spi0(unsigned long cs_mask)
 {
-	u32 pa_mask = 0;
-
 	gpio_select_periph_A(GPIO_PIN_PA0,  0);	/* MISO	*/
 	gpio_select_periph_A(GPIO_PIN_PA1,  0);	/* MOSI	*/
 	gpio_select_periph_A(GPIO_PIN_PA2,  0);	/* SCK	*/
 
-	if (cs_mask & (1 << 0))
-		pa_mask |= 1 << 3;	/* NPCS0 */
-	if (cs_mask & (1 << 1))
-		pa_mask |= 1 << 4;	/* NPCS1 */
-	if (cs_mask & (1 << 2))
-		pa_mask |= 1 << 5;	/* NPCS2 */
-	if (cs_mask & (1 << 3))
-		pa_mask |= 1 << 20;	/* NPCS3 */
-
-	__raw_writel(pa_mask, PIOA_BASE + 0x00);
-	__raw_writel(pa_mask, PIOA_BASE + 0x30);
-	__raw_writel(pa_mask, PIOA_BASE + 0x10);
+	/* Set up NPCSx as GPIO outputs, initially high */
+	if (cs_mask & (1 << 0)) {
+		gpio_set_value(GPIO_PIN_PA3, 1);
+		gpio_select_pio(GPIO_PIN_PA3, GPIOF_OUTPUT);
+	}
+	if (cs_mask & (1 << 1)) {
+		gpio_set_value(GPIO_PIN_PA4, 1);
+		gpio_select_pio(GPIO_PIN_PA4, GPIOF_OUTPUT);
+	}
+	if (cs_mask & (1 << 2)) {
+		gpio_set_value(GPIO_PIN_PA5, 1);
+		gpio_select_pio(GPIO_PIN_PA5, GPIOF_OUTPUT);
+	}
+	if (cs_mask & (1 << 3)) {
+		gpio_set_value(GPIO_PIN_PA20, 1);
+		gpio_select_pio(GPIO_PIN_PA20, GPIOF_OUTPUT);
+	}
 }
 
 void gpio_enable_spi1(unsigned long cs_mask)
@@ -175,13 +178,22 @@ void gpio_enable_spi1(unsigned long cs_mask)
 	gpio_select_periph_B(GPIO_PIN_PB1,  0);	/* MOSI	*/
 	gpio_select_periph_B(GPIO_PIN_PB5,  0);	/* SCK	*/
 
-	if (cs_mask & (1 << 0))
-		gpio_select_periph_B(GPIO_PIN_PB2,  0);	/* NPCS0 */
-	if (cs_mask & (1 << 1))
-		gpio_select_periph_B(GPIO_PIN_PB3,  0);	/* NPCS1 */
-	if (cs_mask & (1 << 2))
-		gpio_select_periph_B(GPIO_PIN_PB4,  0);	/* NPCS2 */
-	if (cs_mask & (1 << 3))
-		gpio_select_periph_A(GPIO_PIN_PA27, 0);	/* NPCS3 */
+	/* Set up NPCSx as GPIO outputs, initially high */
+	if (cs_mask & (1 << 0)) {
+		gpio_set_value(GPIO_PIN_PB2, 1);
+		gpio_select_pio(GPIO_PIN_PB2, GPIOF_OUTPUT);
+	}
+	if (cs_mask & (1 << 1)) {
+		gpio_set_value(GPIO_PIN_PB3, 1);
+		gpio_select_pio(GPIO_PIN_PB3, GPIOF_OUTPUT);
+	}
+	if (cs_mask & (1 << 2)) {
+		gpio_set_value(GPIO_PIN_PB4, 1);
+		gpio_select_pio(GPIO_PIN_PB4, GPIOF_OUTPUT);
+	}
+	if (cs_mask & (1 << 3)) {
+		gpio_set_value(GPIO_PIN_PA27, 1);
+		gpio_select_pio(GPIO_PIN_PA27, GPIOF_OUTPUT);
+	}
 }
 #endif
diff --git a/cpu/at32ap/atmel_mci.c b/cpu/at32ap/atmel_mci.c
index 3795addf05..61aa1849c2 100644
--- a/cpu/at32ap/atmel_mci.c
+++ b/cpu/at32ap/atmel_mci.c
@@ -349,7 +349,7 @@ static int sd_init_card(struct mmc_cid *cid, int verbose)
 
 	mmc_idle_cards();
 	for (i = 0; i < 1000; i++) {
-		ret = mmc_acmd(MMC_ACMD_SD_SEND_OP_COND, CFG_MMC_OP_COND,
+		ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CFG_MMC_OP_COND,
 			       resp, R3 | NID);
 		if (ret || (resp[0] & 0x80000000))
 			break;
@@ -367,7 +367,7 @@ static int sd_init_card(struct mmc_cid *cid, int verbose)
 		mmc_dump_cid(cid);
 
 	/* Get RCA of the card that responded */
-	ret = mmc_cmd(MMC_CMD_SD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR);
+	ret = mmc_cmd(SD_CMD_SEND_RELATIVE_ADDR, 0, resp, R6 | NCR);
 	if (ret)
 		return ret;
 
diff --git a/cpu/at32ap/pio.c b/cpu/at32ap/pio.c
index 9ba0b8ea8b..f64004b659 100644
--- a/cpu/at32ap/pio.c
+++ b/cpu/at32ap/pio.c
@@ -58,3 +58,59 @@ void gpio_select_periph_B(unsigned int pin, int use_pullup)
 	else
 		pio2_writel(base, PUDR, mask);
 }
+
+void gpio_select_pio(unsigned int pin, unsigned long gpiof_flags)
+{
+	void *base = gpio_pin_to_addr(pin);
+	uint32_t mask = 1 << (pin & 0x1f);
+
+	if (!base)
+		panic("Invalid GPIO pin %u\n", pin);
+
+	if (gpiof_flags & GPIOF_OUTPUT) {
+		if (gpiof_flags & GPIOF_MULTIDRV)
+			pio2_writel(base, MDER, mask);
+		else
+			pio2_writel(base, MDDR, mask);
+		pio2_writel(base, PUDR, mask);
+		pio2_writel(base, OER, mask);
+	} else {
+		if (gpiof_flags & GPIOF_PULLUP)
+			pio2_writel(base, PUER, mask);
+		else
+			pio2_writel(base, PUDR, mask);
+		if (gpiof_flags & GPIOF_DEGLITCH)
+			pio2_writel(base, IFER, mask);
+		else
+			pio2_writel(base, IFDR, mask);
+		pio2_writel(base, ODR, mask);
+	}
+
+	pio2_writel(base, PER, mask);
+}
+
+void gpio_set_value(unsigned int pin, int value)
+{
+	void *base = gpio_pin_to_addr(pin);
+	uint32_t mask = 1 << (pin & 0x1f);
+
+	if (!base)
+		panic("Invalid GPIO pin %u\n", pin);
+
+	if (value)
+		pio2_writel(base, SODR, mask);
+	else
+		pio2_writel(base, CODR, mask);
+}
+
+int gpio_get_value(unsigned int pin)
+{
+	void *base = gpio_pin_to_addr(pin);
+	int value;
+
+	if (!base)
+		panic("Invalid GPIO pin %u\n", pin);
+
+	value = pio2_readl(base, PDSR);
+	return (value >> (pin & 0x1f)) & 1;
+}
diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c
index 414759e74c..4d5d141ea2 100644
--- a/cpu/mpc8260/cpu.c
+++ b/cpu/mpc8260/cpu.c
@@ -305,6 +305,11 @@ void ft_cpu_setup (void *blob, bd_t *bd)
 {
 	char * cpu_path = "/cpus/" OF_CPU;
 
+#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
+    defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
+	fdt_fixup_ethernet(blob, bd);
+#endif
+
 	do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
 	do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
 	do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index 36de78d270..cc03f8a01f 100644
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -44,7 +44,6 @@ int checkcpu(void)
 	char buf[32];
 	int i;
 
-#define CPU_TYPE_ENTRY(x) {#x, SPR_##x}
 	const struct cpu_type {
 		char name[15];
 		u32 partid;
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index fb184d816b..67c9e570c3 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -181,8 +181,13 @@ void cpu_init_f (volatile immap_t * im)
 
 	/* System General Purpose Register */
 #ifdef CFG_SICRH
+#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC8313)
+	/* regarding to MPC34x manual rev.1 bits 28..29 must be preserved */
+	im->sysconf.sicrh = (im->sysconf.sicrh & 0x0000000C) | CFG_SICRH;
+#else
 	im->sysconf.sicrh = CFG_SICRH;
 #endif
+#endif
 #ifdef CFG_SICRL
 	im->sysconf.sicrl = CFG_SICRL;
 #endif
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index baf8b81932..0f72051db1 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -323,7 +323,7 @@ void upmconfig (uint upm, uint * table, uint size)
 	/* Find the address for the dummy write transaction */
 	for (brp = &lbc->br0, orp = &lbc->or0, i = 0; i < 8;
 		 i++, brp += 2, orp += 2) {
-		
+
 		/* Look for a valid BR with selected UPM */
 		if ((in_be32(brp) & (BR_V | upmmask)) == (BR_V | upmmask)) {
 			dummy = (volatile u8*)(in_be32(brp) >> BR_BA_SHIFT);
diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c
index ef47ffc952..34bd7214e7 100644
--- a/cpu/ppc4xx/speed.c
+++ b/cpu/ppc4xx/speed.c
@@ -754,7 +754,7 @@ ulong get_OPB_freq (void)
 	return sys_info.freqOPB;
 }
 
-#elif defined(CONFIG_XILINX_ML300)
+#elif defined(CONFIG_XILINX_405)
 extern void get_sys_info (sys_info_t * sysInfo);
 extern ulong get_PCI_freq (void);
 
diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c
index 039ce0f579..4495a808f5 100644
--- a/cpu/pxa/mmc.c
+++ b/cpu/pxa/mmc.c
@@ -119,7 +119,7 @@ mmc_block_read(uchar * dst, ulong src, ulong len)
 	MMC_RDTO = 0xffff;
 	MMC_NOB = 1;
 	MMC_BLKLEN = len;
-	mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl,
+	mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK, argh, argl,
 		MMC_CMDAT_R1 | MMC_CMDAT_READ | MMC_CMDAT_BLOCK |
 		MMC_CMDAT_DATA_EN);
 
@@ -568,7 +568,7 @@ mmc_init(int verbose)
 	MMC_SPI = MMC_SPI_DISABLE;
 
 	/* reset */
-	mmc_cmd(MMC_CMD_RESET, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0);
+	mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, 0, MMC_CMDAT_INIT | MMC_CMDAT_R0);
 	udelay(200000);
 	retries = 3;
 	while (retries--) {
@@ -578,7 +578,10 @@ mmc_init(int verbose)
 			break;
 		}
 
-		resp = mmc_cmd(SD_CMD_APP_OP_COND, 0x0020, 0, MMC_CMDAT_R3 | (retries < 2 ? 0 : MMC_CMDAT_INIT));	/* Select 3.2-3.3 and 3.3-3.4V */
+		/* Select 3.2-3.3 and 3.3-3.4V */
+		resp = mmc_cmd(SD_CMD_APP_SEND_OP_COND, 0x0020, 0,
+				MMC_CMDAT_R3 | (retries < 2 ? 0
+					: MMC_CMDAT_INIT));
 		if (resp[0] & 0x80000000) {
 			mmc_dev.if_type = IF_TYPE_SD;
 			debug("Detected SD card\n");
@@ -616,7 +619,7 @@ mmc_init(int verbose)
 		memcpy(cid_resp, resp, sizeof(cid_resp));
 
 		/* MMC exists, get CSD too */
-		resp = mmc_cmd(MMC_CMD_SET_RCA, 0, 0, MMC_CMDAT_R1);
+		resp = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, 0, 0, MMC_CMDAT_R1);
 		if (IF_TYPE_SD == mmc_dev.if_type)
 			rca = ((resp[0] & 0xffff0000) >> 16);
 		resp = mmc_cmd(MMC_CMD_SEND_CSD, rca, 0, MMC_CMDAT_R2);
diff --git a/cpu/sh3/Makefile b/cpu/sh3/Makefile
index 7679248bfe..a7eb1e22fa 100644
--- a/cpu/sh3/Makefile
+++ b/cpu/sh3/Makefile
@@ -31,19 +31,27 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).a
 
-START	= start.o
+SOBJS	= start.o
 OBJS	= cpu.o interrupts.o watchdog.o time.o cache.o
 
-all:	.depend $(START) $(LIB)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
-$(LIB):	$(OBJS)
-	$(AR) crv $@ $(OBJS)
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
 
 #########################################################################
 
-.depend:	Makefile $(START:.o=.S) $(OBJS:.o=.c)
-		$(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
 
-sinclude .depend
+sinclude $(obj).depend
 
 #########################################################################
diff --git a/cpu/sh4/Makefile b/cpu/sh4/Makefile
index 1bb8bd7729..e38e04f29e 100644
--- a/cpu/sh4/Makefile
+++ b/cpu/sh4/Makefile
@@ -28,19 +28,27 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(CPU).a
 
-START	= start.o
+SOBJS	= start.o
 OBJS	= cpu.o interrupts.o watchdog.o time.o cache.o
 
-all:	.depend $(START) $(LIB)
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
 
-$(LIB):	$(OBJS)
-	$(AR) crv $@ $(OBJS)
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak $(obj).depend
 
 #########################################################################
 
-.depend:	Makefile $(START:.o=.S) $(OBJS:.o=.c)
-		$(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
 
-sinclude .depend
+sinclude $(obj).depend
 
 #########################################################################