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authorWolfgang Denk <wd@denx.de>2009-01-27 20:55:57 +0100
committerWolfgang Denk <wd@denx.de>2009-01-27 20:55:57 +0100
commit49ad4801714039ac8b9cae4de9c097224183e465 (patch)
tree553a394b685fa93deb2c23f8e1fc5b3ed6ceb10f /cpu
parentcb9f622a280075b550fcdd4571753a36d1a92bf9 (diff)
parent2a61eff6a82f0d6e2335d968799b3fbeb3ff4d8e (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-mips
Diffstat (limited to 'cpu')
-rw-r--r--cpu/mips/cpu.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c
index b7180b0c6c..d5a16047de 100644
--- a/cpu/mips/cpu.c
+++ b/cpu/mips/cpu.c
@@ -65,6 +65,34 @@ void flush_cache(ulong start_addr, ulong size)
}
}
+void flush_dcache_range(ulong start_addr, ulong stop)
+{
+ unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
+ unsigned long addr = start_addr & ~(lsize - 1);
+ unsigned long aend = (stop - 1) & ~(lsize - 1);
+
+ while (1) {
+ cache_op(Hit_Writeback_Inv_D, addr);
+ if (addr == aend)
+ break;
+ addr += lsize;
+ }
+}
+
+void invalidate_dcache_range(ulong start_addr, ulong stop)
+{
+ unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
+ unsigned long addr = start_addr & ~(lsize - 1);
+ unsigned long aend = (stop - 1) & ~(lsize - 1);
+
+ while (1) {
+ cache_op(Hit_Invalidate_D, addr);
+ if (addr == aend)
+ break;
+ addr += lsize;
+ }
+}
+
void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1)
{
write_c0_entrylo0(low0);