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| author | Wolfgang Denk <wd@denx.de> | 2008-12-16 01:02:17 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-12-16 01:02:17 +0100 |
| commit | 455ae7e87f67c44e6aea68865c83acadd3fcd36c (patch) | |
| tree | 9f3b69f9c1c2fcc8937e6bd964b1321ac17d45bc /cpu | |
| parent | 84bc72d90c505fec3ef4b693995407a0bd4064e5 (diff) | |
| download | u-boot-455ae7e87f67c44e6aea68865c83acadd3fcd36c.tar.gz u-boot-455ae7e87f67c44e6aea68865c83acadd3fcd36c.tar.bz2 u-boot-455ae7e87f67c44e6aea68865c83acadd3fcd36c.zip | |
Coding style cleanup, update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mcf52x2/cpu_init.c | 2 | ||||
| -rw-r--r-- | cpu/mpc86xx/start.S | 2 | ||||
| -rw-r--r-- | cpu/ppc4xx/cpu.c | 1 | ||||
| -rw-r--r-- | cpu/ppc4xx/start.S | 2 |
4 files changed, 2 insertions, 5 deletions
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c index 18308c8a7a..66f9164d56 100644 --- a/cpu/mcf52x2/cpu_init.c +++ b/cpu/mcf52x2/cpu_init.c @@ -131,7 +131,7 @@ void cpu_init_f(void) mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */ mbar2_writeByte(MCFSIM_SPURVEC, 0x00); - /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); *//* Enable a 1 cycle pre-drive cycle on CS1 */ + /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */ /* FlexBus Chipselect */ init_fbcs(); diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S index 6645cb8825..63cc8dbcda 100644 --- a/cpu/mpc86xx/start.S +++ b/cpu/mpc86xx/start.S @@ -982,5 +982,3 @@ unlock_ram_in_cache: blr #endif #endif - - diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 1f0b56cb76..d09c4c2153 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -706,4 +706,3 @@ int cpu_eth_init(bd_t *bis) #endif return 0; } - diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 4b5349eadd..f2b8908b90 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -727,7 +727,7 @@ _start: ori r2,r2,0xffff mfdcr r1,ISRAM1_DPC and r1,r1,r2 /* Disable parity check */ - mtdcr ISRAM1_DPC,r1 + mtdcr ISRAM1_DPC,r1 mfdcr r1,ISRAM1_PMEG and r1,r1,r2 /* Disable pwr mgmt */ mtdcr ISRAM1_PMEG,r1 |