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author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
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committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/mpc8260/i2c.c | |
parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
download | u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/mpc8260/i2c.c')
-rw-r--r-- | cpu/mpc8260/i2c.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c index a96fbf841e..a93419396f 100644 --- a/cpu/mpc8260/i2c.c +++ b/cpu/mpc8260/i2c.c @@ -54,12 +54,12 @@ static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; /*----------------------------------------------------------------------- * Set default values */ -#ifndef CFG_I2C_SPEED -#define CFG_I2C_SPEED 50000 +#ifndef CONFIG_SYS_I2C_SPEED +#define CONFIG_SYS_I2C_SPEED 50000 #endif -#ifndef CFG_I2C_SLAVE -#define CFG_I2C_SLAVE 0xFE +#ifndef CONFIG_SYS_I2C_SLAVE +#define CONFIG_SYS_I2C_SLAVE 0xFE #endif /*----------------------------------------------------------------------- */ @@ -176,7 +176,7 @@ i2c_roundrate(int hz, int speed, int filter, int modval, */ static int i2c_setrate(int hz, int speed) { - immap_t *immap = (immap_t *)CFG_IMMR ; + immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; int brgval, modval, /* 0-3 */ @@ -219,7 +219,7 @@ static int i2c_setrate(int hz, int speed) void i2c_init(int speed, int slaveadd) { - volatile immap_t *immap = (immap_t *)CFG_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; volatile cpm8260_t *cp = (cpm8260_t *)&immap->im_cpm; volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; volatile iic_t *iip; @@ -227,7 +227,7 @@ void i2c_init(int speed, int slaveadd) volatile I2C_BD *rxbd, *txbd; uint dpaddr; -#ifdef CFG_I2C_INIT_BOARD +#ifdef CONFIG_SYS_I2C_INIT_BOARD /* call board specific i2c bus reset routine before accessing the */ /* environment, which might be in a chip on that bus. For details */ /* about this problem see doc/I2C_Edge_Conditions. */ @@ -270,7 +270,7 @@ void i2c_init(int speed, int slaveadd) * divide BRGCLK by 1) */ PRINTD(("[I2C] Setting rate...\n")); - i2c_setrate (gd->brg_clk, CFG_I2C_SPEED) ; + i2c_setrate (gd->brg_clk, CONFIG_SYS_I2C_SPEED) ; /* Set I2C controller in master mode */ i2c->i2c_i2com = 0x01; @@ -309,7 +309,7 @@ void i2c_init(int speed, int slaveadd) static void i2c_newio(i2c_state_t *state) { - volatile immap_t *immap = (immap_t *)CFG_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; volatile iic_t *iip; uint dpaddr; @@ -494,7 +494,7 @@ int i2c_receive(i2c_state_t *state, static int i2c_doio(i2c_state_t *state) { - volatile immap_t *immap = (immap_t *)CFG_IMMR ; + volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR ; volatile iic_t *iip; volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; volatile I2C_BD *txbd, *rxbd; @@ -667,7 +667,7 @@ i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) xaddr[2] = (addr >> 8) & 0xFF; xaddr[3] = addr & 0xFF; -#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW +#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW /* * EEPROM chips that implement "address overflow" are ones * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address @@ -679,7 +679,7 @@ i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) * be one byte because the extra address bits are hidden in the * chip address. */ - chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); + chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif i2c_newio(&state); @@ -716,7 +716,7 @@ i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) xaddr[2] = (addr >> 8) & 0xFF; xaddr[3] = addr & 0xFF; -#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW +#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW /* * EEPROM chips that implement "address overflow" are ones * like Catalyst 24WC04/08/16 which has 9/10/11 bits of address @@ -728,7 +728,7 @@ i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) * be one byte because the extra address bits are hidden in the * chip address. */ - chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); + chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); #endif i2c_newio(&state); @@ -781,7 +781,7 @@ unsigned int i2c_get_bus_num(void) int i2c_set_bus_num(unsigned int bus) { #if defined(CONFIG_I2C_MUX) - if (bus < CFG_MAX_I2C_BUS) { + if (bus < CONFIG_SYS_MAX_I2C_BUS) { i2c_bus_num = bus; } else { int ret; @@ -793,7 +793,7 @@ int i2c_set_bus_num(unsigned int bus) return ret; } #else - if (bus >= CFG_MAX_I2C_BUS) + if (bus >= CONFIG_SYS_MAX_I2C_BUS) return -1; i2c_bus_num = bus; #endif @@ -802,12 +802,12 @@ int i2c_set_bus_num(unsigned int bus) /* TODO: add 100/400k switching */ unsigned int i2c_get_bus_speed(void) { - return CFG_I2C_SPEED; + return CONFIG_SYS_I2C_SPEED; } int i2c_set_bus_speed(unsigned int speed) { - if (speed != CFG_I2C_SPEED) + if (speed != CONFIG_SYS_I2C_SPEED) return -1; return 0; |