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author | Dave Gerlach <d-gerlach@ti.com> | 2021-06-11 11:45:25 +0300 |
---|---|---|
committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-06-11 16:34:52 +0530 |
commit | 6cfb6ff3379c47b0bc2001a71628386783c724c5 (patch) | |
tree | 331262bb5d42d2fa92499890d4469dc263b713e8 /configs | |
parent | a95f8c07815994ae6ab14597aa263c833797099a (diff) | |
download | u-boot-6cfb6ff3379c47b0bc2001a71628386783c724c5.tar.gz u-boot-6cfb6ff3379c47b0bc2001a71628386783c724c5.tar.bz2 u-boot-6cfb6ff3379c47b0bc2001a71628386783c724c5.zip |
configs: j7200_evm_r5: Enable raw access power management features
Sysfw is not going to provide access to power management features in the
new architecture, so SPL must implement these itself. Enable all the raw
register access based clock + power domain drivers.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tero Kristo <kristo@kernel.org>
Diffstat (limited to 'configs')
-rw-r--r-- | configs/j7200_evm_r5_defconfig | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index 08fad3e04b..5c51bd5ae7 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -75,7 +75,7 @@ CONFIG_SPL_SYSCON=y CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y -CONFIG_CLK_TI_SCI=y +# CONFIG_CLK_TI_SCI is not set CONFIG_DMA_CHANNELS=y CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y @@ -110,7 +110,7 @@ CONFIG_SPL_PINCTRL=y # CONFIG_SPL_PINCTRL_GENERIC is not set CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y -CONFIG_TI_SCI_POWER_DOMAIN=y +# CONFIG_TI_SCI_POWER_DOMAIN is not set CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_DM_RESET=y @@ -142,3 +142,13 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x6164 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_FS_EXT4=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_SOC_DEVICE=y +CONFIG_SOC_DEVICE_TI_K3=y +CONFIG_TI_POWER_DOMAIN=y +CONFIG_SPL_CLK_CCF=y +CONFIG_LIB_RATIONAL=y +CONFIG_SPL_LIB_RATIONAL=y +CONFIG_SPL_CLK_K3_PLL=y +CONFIG_SPL_CLK_K3=y +CONFIG_K3_DM_FW=y +CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y |