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| author | Alexander Graf <agraf@suse.de> | 2017-07-03 13:41:36 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2017-08-02 09:11:51 +0200 |
| commit | 584dc4095ed2e5d70146c5cb220fac18645798d1 (patch) | |
| tree | f7359db4eda0e3007e41c7d1a21fbee016a81e15 /configs | |
| parent | 61d8eeb0bceee686895d7703b3702298c7891b0b (diff) | |
| download | u-boot-584dc4095ed2e5d70146c5cb220fac18645798d1.tar.gz u-boot-584dc4095ed2e5d70146c5cb220fac18645798d1.tar.bz2 u-boot-584dc4095ed2e5d70146c5cb220fac18645798d1.zip | |
zynq: Add Z-Turn board
The Z-Turn board is a low cost development board based on the
Xilinx Zynq SoC. While it's powerful and quite versatile, it
so far lacked upstream support.
This patch adds basic support for the Z-Turn. It does however
for now miss enablement for MIO51 reset which means that USB
and ethernet don't work. For that either FSBL or SPL need to
be adjusted. The SPL part will follow later.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'configs')
| -rw-r--r-- | configs/zynq_z_turn_defconfig | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/configs/zynq_z_turn_defconfig b/configs/zynq_z_turn_defconfig new file mode 100644 index 0000000000..b550912222 --- /dev/null +++ b/configs/zynq_z_turn_defconfig @@ -0,0 +1,59 @@ +CONFIG_ARM=y +CONFIG_ARCH_ZYNQ=y +CONFIG_SYS_TEXT_BASE=0x4000000 +CONFIG_DEFAULT_DEVICE_TREE="zynq-zturn-myir" +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_VERBOSE=y +CONFIG_ENV_IS_NOWHERE=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_SPL=y +CONFIG_SPL_OS_BOOT=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="Zynq> " +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_USB=y +CONFIG_CMD_DFU=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TFTPPUT=y +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_SPL_DM_SEQ_ALIAS=y +CONFIG_DFU_MMC=y +CONFIG_DFU_RAM=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ZYNQ=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_BAR=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_ZYNQ_GEM=y +CONFIG_DEBUG_UART_ZYNQ=y +CONFIG_DEBUG_UART_BASE=0xe0001000 +CONFIG_DEBUG_UART_CLOCK=50000000 +CONFIG_ZYNQ_QSPI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_STORAGE=y +CONFIG_USB_GADGET=y +CONFIG_CI_UDC=y +CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_G_DNL_MANUFACTURER="Xilinx" +CONFIG_G_DNL_VENDOR_NUM=0x03FD +CONFIG_G_DNL_PRODUCT_NUM=0x0300 |