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| author | jk.kernel@gmail.com <jk.kernel@gmail.com> | 2016-07-26 18:28:29 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2016-07-31 07:24:20 -0600 |
| commit | d7ca67b7cdd67f79637a8a0097277a68294fa3d8 (patch) | |
| tree | 87077a1e3fd84a2ba73427b54f414b6a106c0cb2 /configs/fennec-rk3288_defconfig | |
| parent | cba6bb1b74133060207192fba55e650d5744ed39 (diff) | |
| download | u-boot-d7ca67b7cdd67f79637a8a0097277a68294fa3d8.tar.gz u-boot-d7ca67b7cdd67f79637a8a0097277a68294fa3d8.tar.bz2 u-boot-d7ca67b7cdd67f79637a8a0097277a68294fa3d8.zip | |
rockchip: add basic support for fennec-rk3288 board
Fennec is a RK3288-based development board with 2 USB ports, HDMI,
micro-SD card, audio and WiFi and Gigabit Ethernet. It also includes
on-board 8GB eMMC and 2GB of SDRAM. Expansion connectors provides access
to display pins, I2C, SPI, UART and GPIOs.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'configs/fennec-rk3288_defconfig')
| -rw-r--r-- | configs/fennec-rk3288_defconfig | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/configs/fennec-rk3288_defconfig b/configs/fennec-rk3288_defconfig new file mode 100644 index 0000000000..bcd6ebf29a --- /dev/null +++ b/configs/fennec-rk3288_defconfig @@ -0,0 +1,66 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_ROCKCHIP_RK3288=y +CONFIG_TARGET_FENNEC_RK3288=y +CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-fennec" +CONFIG_SPL_STACK_R=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BOOTZ=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_I2C=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_TIME=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_SYSRESET=y +CONFIG_DM_MMC=y +CONFIG_ROCKCHIP_DWMMC=y +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_FULL is not set +CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_FULL is not set +CONFIG_ROCKCHIP_RK3288_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK808=y +CONFIG_DM_REGULATOR=y +CONFIG_REGULATOR_RK808=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0xff690000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550=y +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_USE_TINY_PRINTF=y +CONFIG_CMD_DHRYSTONE=y +CONFIG_ERRNO_STR=y +# CONFIG_SPL_SIMPLE_BUS is not set |