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author | Marek Vasut <marex@denx.de> | 2022-04-08 02:15:01 +0200 |
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committer | Stefano Babic <sbabic@denx.de> | 2022-04-12 21:08:23 +0200 |
commit | d7f72b68307ee3323c14c1c9b27e7d3b5a460bf7 (patch) | |
tree | dd0d65e191a4b5fcdd3063f849953363d843e7d1 /board | |
parent | 558331e0f3deac0f8cb586204ce96bd6455b4167 (diff) | |
download | u-boot-d7f72b68307ee3323c14c1c9b27e7d3b5a460bf7.tar.gz u-boot-d7f72b68307ee3323c14c1c9b27e7d3b5a460bf7.tar.bz2 u-boot-d7f72b68307ee3323c14c1c9b27e7d3b5a460bf7.zip |
ARM: dts: imx8mm: Add i.MX8M Mini Toradex Verdin based Menlo board
Add new board based on the Toradex Verdin iMX8M Mini SoM, the MX8Menlo.
The board is a compatible replacement for i.MX53 M53Menlo and features
USB, multiple UARTs, ethernet, LEDs, SD and eMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'board')
-rw-r--r-- | board/menlo/mx8menlo/Kconfig | 39 | ||||
-rw-r--r-- | board/menlo/mx8menlo/MAINTAINERS | 7 | ||||
-rw-r--r-- | board/menlo/mx8menlo/Makefile | 25 | ||||
-rw-r--r-- | board/menlo/mx8menlo/mx8menlo.c | 56 |
4 files changed, 127 insertions, 0 deletions
diff --git a/board/menlo/mx8menlo/Kconfig b/board/menlo/mx8menlo/Kconfig new file mode 100644 index 0000000000..51d0ee355e --- /dev/null +++ b/board/menlo/mx8menlo/Kconfig @@ -0,0 +1,39 @@ +if TARGET_IMX8MM_MX8MENLO + +config SYS_BOARD + default "mx8menlo" + +config SYS_VENDOR + default "menlo" + +config SYS_CONFIG_NAME + default "imx8mm-mx8menlo" + +config TDX_CFG_BLOCK + default y + +config TDX_CFG_BLOCK_EXTRA + default y + +config TDX_HAVE_MMC + default y + +config TDX_HAVE_EEPROM_EXTRA + default y + +config TDX_CFG_BLOCK_DEV + default "0" + +config TDX_CFG_BLOCK_PART + default "1" + +# Toradex config block in eMMC, at the end of 1st "boot sector" +config TDX_CFG_BLOCK_OFFSET + default "-512" + +config IMX_CONFIG + default "board/toradex/verdin-imx8mm/imximage.cfg" + +source "board/toradex/common/Kconfig" + +endif diff --git a/board/menlo/mx8menlo/MAINTAINERS b/board/menlo/mx8menlo/MAINTAINERS new file mode 100644 index 0000000000..09e6aef6c3 --- /dev/null +++ b/board/menlo/mx8menlo/MAINTAINERS @@ -0,0 +1,7 @@ +MX8MENLO BOARD +M: Marek Vasut <marex@denx.de> +M: Olaf Mandel <o.mandel@menlosystems.com> +S: Maintained +F: board/menlo/mx8menlo/ +F: include/configs/imx8mm-mx8menlo.h +F: configs/imx8mm-mx8menlo_defconfig diff --git a/board/menlo/mx8menlo/Makefile b/board/menlo/mx8menlo/Makefile new file mode 100644 index 0000000000..fd5ec82633 --- /dev/null +++ b/board/menlo/mx8menlo/Makefile @@ -0,0 +1,25 @@ +# +# Menlosystems MX8Menlo +# Copyright (C) 2021-2022 Marek Vasut <marex@denx.de> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mx8menlo.o + +obj-y += ../../toradex/verdin-imx8mm/verdin-imx8mm.o + +ifdef CONFIG_SPL_BUILD +obj-y += ../../toradex/verdin-imx8mm/spl.o +obj-$(CONFIG_IMX8M_LPDDR4) += ../../toradex/verdin-imx8mm/lpddr4_timing.o +endif + +# Common for all Toradex modules +ifeq ($(CONFIG_SPL_BUILD),y) +# Necessary to create built-in.o +obj- := __dummy__.o +else +obj-$(CONFIG_TDX_CFG_BLOCK) += ../../toradex/common/tdx-cfg-block.o +obj-y += ../../toradex/common/tdx-common.o +obj-y += ../../toradex/common/tdx-eeprom.o +endif diff --git a/board/menlo/mx8menlo/mx8menlo.c b/board/menlo/mx8menlo/mx8menlo.c new file mode 100644 index 0000000000..a4d0becdcc --- /dev/null +++ b/board/menlo/mx8menlo/mx8menlo.c @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2021-2022 Marek Vasut <marex@denx.de> + */ + +#include <common.h> +#include <asm/arch/clock.h> +#include <asm/arch/imx8mm_pins.h> +#include <asm/arch/sys_proto.h> +#include <asm/global_data.h> +#include <asm/io.h> +#include <asm/mach-imx/iomux-v3.h> +#include <spl.h> + +#define UART_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PE | PAD_CTL_DSE4) +#define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) + +/* Verdin UART_3, Console/Debug UART */ +static iomux_v3_cfg_t const uart_pads[] = { + IMX8MM_PAD_SAI3_TXFS_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + IMX8MM_PAD_SAI3_TXC_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const wdog_pads[] = { + IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), +}; + +#define SNVS_BASE_ADDR 0x30370000 +#define SNVS_LPSR 0x4c +#define SNVS_LPLVDR 0x64 +#define SNVS_LPPGDR_INIT 0x41736166 + +static void setup_snvs(void) +{ + /* Enable SNVS clock */ + clock_enable(CCGR_SNVS, 1); + /* Initialize glitch detect */ + writel(SNVS_LPPGDR_INIT, SNVS_BASE_ADDR + SNVS_LPLVDR); + /* Clear interrupt status */ + writel(0xffffffff, SNVS_BASE_ADDR + SNVS_LPSR); +} + +void board_early_init(void) +{ + struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; + + imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); + + set_wdog_reset(wdog); + + imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); + + init_uart_clk(1); + + setup_snvs(); +} |