arm: kirkwood: GoFlex Home : Use Marvell uclass mvgbe and PHY driver for Ethernet

The GoFlex Home board has the network chip Marvell 88E1116R.
Use uclass mvgbe and the compatible driver M88E1118R to bring up Ethernet.

- Currently, CONFIG_RESET_PHY_R symbol is used in
arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood
boards with mv8831116 PHY, with each board defines the function
reset_phy(). Undefine it for this board.
- Add board_eth_init() to use uclass mvgbe to bring up the network.
And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: use CONFIG_SYS_THUMB_BUILD to keep u-boot image
under 512K, use BIT macro, and cleanup comments.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>

1 files changed, 11 insertions, 73 deletions

diff --git a/board/Seagate/goflexhome/goflexhome.c b/board/Seagate/goflexhome/goflexhome.c
index 52be64fb8c..caea89c10e 100644
--- a/board/Seagate/goflexhome/goflexhome.c
+++ b/board/Seagate/goflexhome/goflexhome.c
@@ -1,10 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2021
- * Tony Dinh <mibodhi@gmail.com>
- * Suriyan Ramasami <suriyan.r@gmail.com>
- *
- * Copyright (C) 2013 Suriyan Ramasami <suriyan.r@gmail.com>
+ * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com>
+ * Copyright (C) 2013-2021 Suriyan Ramasami <suriyan.r@gmail.com>
  *
  * Based on dockstar.c originally written by
  * Copyright (C) 2010  Eric C. Cooper <ecc@cmu.edu>
@@ -18,14 +15,14 @@
 #include <common.h>
 #include <bootstage.h>
 #include <init.h>
-#include <miiphy.h>
-#include <net.h>
+#include <netdev.h>
 #include <asm/global_data.h>
 #include <asm/mach-types.h>
 #include <asm/arch/soc.h>
 #include <asm/arch/mpp.h>
 #include <asm/arch/cpu.h>
 #include <asm/io.h>
+#include <linux/bitops.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -98,6 +95,11 @@ int board_early_init_f(void)
 	return 0;
 }
 
+int board_eth_init(struct bd_info *bis)
+{
+	return cpu_eth_init(bis);
+}
+
 int board_init(void)
 {
 	/*
@@ -111,73 +113,9 @@ int board_init(void)
 	return 0;
 }
 
-static int fdt_get_phy_addr(const char *path)
-{
-	const void *fdt = gd->fdt_blob;
-	const u32 *reg;
-	const u32 *val;
-	int node, phandle, addr;
-
-	/* Find the node by its full path */
-	node = fdt_path_offset(fdt, path);
-	if (node >= 0) {
-		/* Look up phy-handle */
-		val = fdt_getprop(fdt, node, "phy-handle", NULL);
-		if (val) {
-			phandle = fdt32_to_cpu(*val);
-			if (!phandle)
-				return -1;
-			/* Follow it to its node */
-			node = fdt_node_offset_by_phandle(fdt, phandle);
-			if (node) {
-				/* Look up reg */
-				reg = fdt_getprop(fdt, node, "reg", NULL);
-				if (reg) {
-					addr = fdt32_to_cpu(*reg);
-					return addr;
-				}
-			}
-		}
-	}
-	return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
-{
-	u16 reg;
-	int phyaddr;
-	char *name = "ethernet-controller@72000";
-	char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
-
-	if (miiphy_set_current_dev(name))
-		return;
-
-	phyaddr = fdt_get_phy_addr(eth0_path);
-	if (phyaddr < 0)
-		return;
-
-	/*
-	 * Enable RGMII delay on Tx and Rx for CPU port
-	 * Ref: sec 4.7.2 of chip datasheet
-	 */
-	miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
-	miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, &reg);
-	reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
-	miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
-	miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
-
-	/* reset the phy */
-	miiphy_reset(name, phyaddr);
-
-	printf("88E1116 Initialized on %s\n", name);
-}
-#endif /* CONFIG_RESET_PHY_R */
-
 #if CONFIG_IS_ENABLED(BOOTSTAGE)
-#define GREEN_LED	(1 << 14)
-#define ORANGE_LED	(1 << 15)
+#define GREEN_LED	BIT(14)
+#define ORANGE_LED	BIT(15)
 #define BOTH_LEDS	(GREEN_LED | ORANGE_LED)
 #define NEITHER_LED	0