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authorTom Rini <trini@konsulko.com>2015-08-05 14:12:37 -0400
committerTom Rini <trini@konsulko.com>2015-08-05 14:12:37 -0400
commit1a2728ae4faf12874173de156b8a7e66cfbbeae5 (patch)
tree9aba8e6c915b341df8ec6077d8ecb28f1eb32b0b /board
parentdcc7dbc73169bb4e39f27c1d95bbf031ccfc1744 (diff)
parent12c7510f17ff29190e52336910e43a50c0d620a6 (diff)
downloadu-boot-1a2728ae4faf12874173de156b8a7e66cfbbeae5.tar.gz
u-boot-1a2728ae4faf12874173de156b8a7e66cfbbeae5.tar.bz2
u-boot-1a2728ae4faf12874173de156b8a7e66cfbbeae5.zip
Merge git://git.denx.de/u-boot-x86
Diffstat (limited to 'board')
-rw-r--r--board/efi/Kconfig19
-rw-r--r--board/efi/efi-x86/Kconfig15
-rw-r--r--board/efi/efi-x86/MAINTAINERS6
-rw-r--r--board/efi/efi-x86/Makefile7
-rw-r--r--board/efi/efi-x86/efi.c18
-rw-r--r--board/emulation/qemu-x86/Kconfig5
-rw-r--r--board/intel/Kconfig9
-rw-r--r--board/intel/bayleybay/Kconfig27
-rw-r--r--board/intel/bayleybay/MAINTAINERS6
-rw-r--r--board/intel/bayleybay/Makefile7
-rw-r--r--board/intel/bayleybay/bayleybay.c19
-rw-r--r--board/intel/bayleybay/start.S9
-rw-r--r--board/intel/minnowmax/Kconfig5
-rw-r--r--board/intel/minnowmax/minnowmax.c12
14 files changed, 148 insertions, 16 deletions
diff --git a/board/efi/Kconfig b/board/efi/Kconfig
new file mode 100644
index 0000000000..6f86a48fa7
--- /dev/null
+++ b/board/efi/Kconfig
@@ -0,0 +1,19 @@
+if VENDOR_EFI
+
+choice
+ prompt "Mainboard model"
+ optional
+
+config TARGET_EFI
+ bool "efi"
+ help
+ This target is used for running U-Boot on top of EFI. In
+ this case EFI does the early initialisation, and U-Boot
+ takes over once the RAM, video and CPU are fully running.
+ U-Boot is loaded as an application from EFI.
+
+endchoice
+
+source "board/efi/efi-x86/Kconfig"
+
+endif
diff --git a/board/efi/efi-x86/Kconfig b/board/efi/efi-x86/Kconfig
new file mode 100644
index 0000000000..fa609ba5d2
--- /dev/null
+++ b/board/efi/efi-x86/Kconfig
@@ -0,0 +1,15 @@
+if TARGET_EFI
+
+config SYS_BOARD
+ default "efi-x86"
+
+config SYS_VENDOR
+ default "efi"
+
+config SYS_SOC
+ default "efi"
+
+config SYS_CONFIG_NAME
+ default "efi-x86"
+
+endif
diff --git a/board/efi/efi-x86/MAINTAINERS b/board/efi/efi-x86/MAINTAINERS
new file mode 100644
index 0000000000..a44c7c64be
--- /dev/null
+++ b/board/efi/efi-x86/MAINTAINERS
@@ -0,0 +1,6 @@
+EFI-X86 BOARD
+M: Simon Glass <sjg@chromium.org>
+S: Maintained
+F: board/efi/efi-x86/
+F: include/configs/efi-x86.h
+F: configs/efi-x86_defconfig
diff --git a/board/efi/efi-x86/Makefile b/board/efi/efi-x86/Makefile
new file mode 100644
index 0000000000..9b1e0bdb31
--- /dev/null
+++ b/board/efi/efi-x86/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2015 Google, Inc
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += efi.o
diff --git a/board/efi/efi-x86/efi.c b/board/efi/efi-x86/efi.c
new file mode 100644
index 0000000000..08958f91f6
--- /dev/null
+++ b/board/efi/efi-x86/efi.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/gpio.h>
+
+int arch_early_init_r(void)
+{
+ return 0;
+}
+
+void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
+{
+ return;
+}
diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig
index e777ef4409..c9181fc1bf 100644
--- a/board/emulation/qemu-x86/Kconfig
+++ b/board/emulation/qemu-x86/Kconfig
@@ -13,11 +13,12 @@ config SYS_CONFIG_NAME
default "qemu-x86"
config SYS_TEXT_BASE
- default 0xfff00000
+ default 0xfff00000 if !EFI_STUB
+ default 0x01110000 if EFI_STUB
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select X86_RESET_VECTOR
+ select X86_RESET_VECTOR if !EFI_STUB
select QEMU
select BOARD_ROMSIZE_KB_1024
diff --git a/board/intel/Kconfig b/board/intel/Kconfig
index 3d9ecf0693..f7d71c3612 100644
--- a/board/intel/Kconfig
+++ b/board/intel/Kconfig
@@ -10,6 +10,14 @@ choice
prompt "Mainboard model"
optional
+config TARGET_BAYLEYBAY
+ bool "Bayley Bay"
+ help
+ This is the Intel Bayley Bay Customer Reference Board. It contains an
+ Intel quad-core Atom Processor E3800 with dual-channel DDR3L SODIMM
+ 4GB memory, HDMI/DP/VGA display, HD audio, SATA, USB2, USB3, SD, eMMC,
+ PCIe and some other sensor interfaces.
+
config TARGET_CROWNBAY
bool "Crown Bay"
help
@@ -45,6 +53,7 @@ config TARGET_MINNOWMAX
endchoice
+source "board/intel/bayleybay/Kconfig"
source "board/intel/crownbay/Kconfig"
source "board/intel/galileo/Kconfig"
source "board/intel/minnowmax/Kconfig"
diff --git a/board/intel/bayleybay/Kconfig b/board/intel/bayleybay/Kconfig
new file mode 100644
index 0000000000..597228fdbc
--- /dev/null
+++ b/board/intel/bayleybay/Kconfig
@@ -0,0 +1,27 @@
+if TARGET_BAYLEYBAY
+
+config SYS_BOARD
+ default "bayleybay"
+
+config SYS_VENDOR
+ default "intel"
+
+config SYS_SOC
+ default "baytrail"
+
+config SYS_CONFIG_NAME
+ default "bayleybay"
+
+config SYS_TEXT_BASE
+ default 0xfff00000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select X86_RESET_VECTOR
+ select INTEL_BAYTRAIL
+ select BOARD_ROMSIZE_KB_8192
+
+config PCIE_ECAM_BASE
+ default 0xe0000000
+
+endif
diff --git a/board/intel/bayleybay/MAINTAINERS b/board/intel/bayleybay/MAINTAINERS
new file mode 100644
index 0000000000..85fa51626a
--- /dev/null
+++ b/board/intel/bayleybay/MAINTAINERS
@@ -0,0 +1,6 @@
+Intel Bayley Bay
+M: Bin Meng <bmeng.cn@gmail.com>
+S: Maintained
+F: board/intel/bayleybay
+F: include/configs/bayleybay.h
+F: configs/bayleybay_defconfig
diff --git a/board/intel/bayleybay/Makefile b/board/intel/bayleybay/Makefile
new file mode 100644
index 0000000000..88b5aad634
--- /dev/null
+++ b/board/intel/bayleybay/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += bayleybay.o start.o
diff --git a/board/intel/bayleybay/bayleybay.c b/board/intel/bayleybay/bayleybay.c
new file mode 100644
index 0000000000..78447965b9
--- /dev/null
+++ b/board/intel/bayleybay/bayleybay.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/gpio.h>
+#include <netdev.h>
+
+void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
+{
+ return;
+}
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
diff --git a/board/intel/bayleybay/start.S b/board/intel/bayleybay/start.S
new file mode 100644
index 0000000000..a71db69be9
--- /dev/null
+++ b/board/intel/bayleybay/start.S
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+.globl early_board_init
+early_board_init:
+ jmp early_board_init_ret
diff --git a/board/intel/minnowmax/Kconfig b/board/intel/minnowmax/Kconfig
index f2a0b71c44..7e975f9c3a 100644
--- a/board/intel/minnowmax/Kconfig
+++ b/board/intel/minnowmax/Kconfig
@@ -13,11 +13,12 @@ config SYS_CONFIG_NAME
default "minnowmax"
config SYS_TEXT_BASE
- default 0xfff00000
+ default 0xfff00000 if !EFI_STUB
+ default 0x01110000 if EFI_STUB
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
- select X86_RESET_VECTOR
+ select X86_RESET_VECTOR if !EFI_STUB
select INTEL_BAYTRAIL
select BOARD_ROMSIZE_KB_8192
diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c
index 383cae068b..c4f2c33b87 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -6,12 +6,7 @@
#include <common.h>
#include <asm/gpio.h>
-#include <asm/ibmpc.h>
-#include <asm/pnp_def.h>
#include <netdev.h>
-#include <smsc_lpc47m.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, 4)
int arch_early_init_r(void)
{
@@ -21,13 +16,6 @@ int arch_early_init_r(void)
return 0;
}
-int board_early_init_f(void)
-{
- lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
-
- return 0;
-}
-
void setup_pch_gpios(u16 gpiobase, const struct pch_gpio_map *gpio)
{
return;