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author | Stefan Roese <sr@denx.de> | 2008-01-09 10:43:47 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2008-01-09 10:43:47 +0100 |
commit | 1466ef8db57a2b52efd8c900dd37e7b3840dc263 (patch) | |
tree | a81e87f5d4968652555d64d122bcfef01f6ce7c7 /board | |
parent | 1f84021a85abeb837d2ce0dc84297b4f1d45d516 (diff) | |
parent | b2e2142c500c48a57f18f9dd30e66c13caea0971 (diff) | |
download | u-boot-1466ef8db57a2b52efd8c900dd37e7b3840dc263.tar.gz u-boot-1466ef8db57a2b52efd8c900dd37e7b3840dc263.tar.bz2 u-boot-1466ef8db57a2b52efd8c900dd37e7b3840dc263.zip |
Merge branch 'lwmon5-no-ocm'
Diffstat (limited to 'board')
-rw-r--r-- | board/lwmon5/init.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/lwmon5/init.S b/board/lwmon5/init.S index 6798e80985..5aade72b52 100644 --- a/board/lwmon5/init.S +++ b/board/lwmon5/init.S @@ -57,7 +57,7 @@ tlbtab: #ifdef CFG_INIT_RAM_DCACHE /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry(CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G) + tlbentry(CFG_INIT_RAM_ADDR, SZ_4K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G) #endif /* TLB-entry for PCI Memory */ |