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| author | Tom Rini <trini@konsulko.com> | 2021-12-14 13:36:38 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2021-12-27 16:20:18 -0500 |
| commit | 0abfcf2fd3067c2622261fbdecdf2a4461f5ac8c (patch) | |
| tree | 62c54bb38cbec0d5827647c4c3dc41f3832f19c4 /board | |
| parent | 450de19b8009bf92d75f27850d86e0464d23f9d3 (diff) | |
| download | u-boot-0abfcf2fd3067c2622261fbdecdf2a4461f5ac8c.tar.gz u-boot-0abfcf2fd3067c2622261fbdecdf2a4461f5ac8c.tar.bz2 u-boot-0abfcf2fd3067c2622261fbdecdf2a4461f5ac8c.zip | |
nxp: ics307_clk: Guard get_board_ddr_clk function correctly
When we have CONFIG_DYNAMIC_DDR_CLK_FREQ set is the only time we should
have this function, so guard it so that we can include <clock_legacy.h>
in this file later on.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board')
| -rw-r--r-- | board/freescale/common/ics307_clk.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c index 2143395781..03be8be303 100644 --- a/board/freescale/common/ics307_clk.c +++ b/board/freescale/common/ics307_clk.c @@ -137,6 +137,7 @@ unsigned long get_board_sys_clk(void) in_8(&fpga_reg->sclk[2])); } +#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ unsigned long get_board_ddr_clk(void) { return ics307_clk_freq( @@ -144,3 +145,4 @@ unsigned long get_board_ddr_clk(void) in_8(&fpga_reg->dclk[1]), in_8(&fpga_reg->dclk[2])); } +#endif |