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author | Michal Simek <michal.simek@xilinx.com> | 2020-04-08 13:24:05 +0200 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2020-04-27 13:57:17 +0200 |
commit | dec206a09b660ee1ac58e3cd9a7b2003aeca4381 (patch) | |
tree | 80ea5401ba7c33b81b0365145a8a8d4608576b21 /board/xilinx | |
parent | 80fdef12b22ab70f9d83343016abcd3b50a87d7c (diff) | |
download | u-boot-dec206a09b660ee1ac58e3cd9a7b2003aeca4381.tar.gz u-boot-dec206a09b660ee1ac58e3cd9a7b2003aeca4381.tar.bz2 u-boot-dec206a09b660ee1ac58e3cd9a7b2003aeca4381.zip |
xilinx: zynqmp: Fix MIO 18 configuration on zcu104 revC
Without this change QSPI is not detected on zcu104 revC.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/xilinx')
-rw-r--r-- | board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c b/board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c index 4805e5a3b9..383e3d0c7e 100644 --- a/board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c +++ b/board/xilinx/zynqmp/zynqmp-zcu104-revA/psu_init_gpl.c @@ -363,6 +363,7 @@ static unsigned long psu_mio_init_data(void) psu_mask_write(0xFF18000C, 0x000000FEU, 0x00000002U); psu_mask_write(0xFF180010, 0x000000FEU, 0x00000002U); psu_mask_write(0xFF180014, 0x000000FEU, 0x00000002U); + psu_mask_write(0xFF180018, 0x000000FEU, 0x00000002U); psu_mask_write(0xFF180040, 0x000000FEU, 0x00000040U); psu_mask_write(0xFF180044, 0x000000FEU, 0x00000040U); psu_mask_write(0xFF180048, 0x000000FEU, 0x000000C0U); @@ -408,7 +409,7 @@ static unsigned long psu_mio_init_data(void) psu_mask_write(0xFF18012C, 0x000000FEU, 0x00000002U); psu_mask_write(0xFF180130, 0x000000FEU, 0x000000C0U); psu_mask_write(0xFF180134, 0x000000FEU, 0x000000C0U); - psu_mask_write(0xFF180204, 0x7B3F003FU, 0x52240000U); + psu_mask_write(0xFF180204, 0x7B3F007FU, 0x52240000U); psu_mask_write(0xFF180208, 0xFFFFE000U, 0x00B02000U); psu_mask_write(0xFF18020C, 0x00003FFFU, 0x00000FC0U); psu_mask_write(0xFF180138, 0x03FFFFFFU, 0x03FFFFFFU); |