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| author | Gerard Salvatella <gerard.salvatella@toradex.com> | 2019-02-08 18:42:28 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-04-13 20:30:09 +0200 |
| commit | 82029bf5b321278783408aef597863dcf54195c3 (patch) | |
| tree | aeab674835bb352be446a0a889ddde300b1334a7 /board/toradex | |
| parent | 84b2ee3abd247988228e3b32b2ac6a9d857ef0d0 (diff) | |
| download | u-boot-82029bf5b321278783408aef597863dcf54195c3.tar.gz u-boot-82029bf5b321278783408aef597863dcf54195c3.tar.bz2 u-boot-82029bf5b321278783408aef597863dcf54195c3.zip | |
colibri_imx6: added nreset gpio on reboot
RGMII_RD1 pin (active high, GPIO6_IO27) is triggered on reboot during
the SPL phase. This asserts (active low) nReset_Out from the PMIC.
Only V1.1 and later Colibri iMX6 modules implement this in hw. Previous
versions do not use this pin, so it is safe to leave it enabled at all
times.
Signed-off-by: Gerard Salvatella <gerard.salvatella@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'board/toradex')
| -rw-r--r-- | board/toradex/colibri_imx6/colibri_imx6.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/board/toradex/colibri_imx6/colibri_imx6.c b/board/toradex/colibri_imx6/colibri_imx6.c index bdc7769d9e..c634e3243d 100644 --- a/board/toradex/colibri_imx6/colibri_imx6.c +++ b/board/toradex/colibri_imx6/colibri_imx6.c @@ -30,6 +30,7 @@ #include <micrel.h> #include <miiphy.h> #include <netdev.h> +#include <cpu.h> #include "../common/tdx-cfg-block.h" #ifdef CONFIG_TDX_CMD_IMX_MFGR @@ -1070,6 +1071,26 @@ static void spl_dram_init(void) udelay(100); } +static iomux_v3_cfg_t const gpio_reset_pad[] = { + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL) | + MUX_MODE_SION +#define GPIO_NRESET IMX_GPIO_NR(6, 27) +}; + +#define IMX_RESET_CAUSE_POR 0x00011 +static void nreset_out(void) +{ + int reset_cause = get_imx_reset_cause(); + + if (reset_cause != IMX_RESET_CAUSE_POR) { + imx_iomux_v3_setup_multiple_pads(gpio_reset_pad, + ARRAY_SIZE(gpio_reset_pad)); + gpio_direction_output(GPIO_NRESET, 1); + udelay(100); + gpio_direction_output(GPIO_NRESET, 0); + } +} + void board_init_f(ulong dummy) { /* setup AIPS and disable watchdog */ @@ -1096,6 +1117,9 @@ void board_init_f(ulong dummy) /* Clear the BSS. */ memset(__bss_start, 0, __bss_end - __bss_start); + /* Assert nReset_Out */ + nreset_out(); + /* load/boot image from boot device */ board_init_r(NULL, 0); } |