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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/mousse | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
| download | u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.gz u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.tar.bz2 u-boot-6d0f6bcf337c5261c08fabe12982178c2c489d76.zip | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/mousse')
| -rw-r--r-- | board/mousse/flash.c | 2 | ||||
| -rw-r--r-- | board/mousse/mousse.c | 2 | ||||
| -rw-r--r-- | board/mousse/mousse.h | 16 |
3 files changed, 10 insertions, 10 deletions
diff --git a/board/mousse/flash.c b/board/mousse/flash.c index 2c32b8ffaa..d729f33f93 100644 --- a/board/mousse/flash.c +++ b/board/mousse/flash.c @@ -50,7 +50,7 @@ int flashLibInited = 0; #define PRIVATE #endif -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; +flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; #define SLEEP_DELAY 166 #define FLASH_SECTOR_SIZE (64*1024) diff --git a/board/mousse/mousse.c b/board/mousse/mousse.c index 7b61266483..6a12b576e0 100644 --- a/board/mousse/mousse.c +++ b/board/mousse/mousse.c @@ -58,7 +58,7 @@ int checkflash (void) phys_size_t initdram (int board_type) { - return CFG_RAM_SIZE; + return CONFIG_SYS_RAM_SIZE; } diff --git a/board/mousse/mousse.h b/board/mousse/mousse.h index 5468314eb7..10a0062a8d 100644 --- a/board/mousse/mousse.h +++ b/board/mousse/mousse.h @@ -204,17 +204,17 @@ #define PROMISE_MBAR5 (PROMISE_MBAR0 + 0x5000) /* ATA/66 Controller offsets */ -#define CFG_ATA_BASE_ADDR PROMISE_MBAR0 -#define CFG_IDE_MAXBUS 2 /* ide0/ide1 */ -#define CFG_IDE_MAXDEVICE 2 /* 2 drives per controller */ -#define CFG_ATA_IDE0_OFFSET 0 -#define CFG_ATA_IDE1_OFFSET 0x3000 +#define CONFIG_SYS_ATA_BASE_ADDR PROMISE_MBAR0 +#define CONFIG_SYS_IDE_MAXBUS 2 /* ide0/ide1 */ +#define CONFIG_SYS_IDE_MAXDEVICE 2 /* 2 drives per controller */ +#define CONFIG_SYS_ATA_IDE0_OFFSET 0 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x3000 /* * Definitions for accessing IDE controller registers */ -#define CFG_ATA_DATA_OFFSET 0 -#define CFG_ATA_REG_OFFSET 0 -#define CFG_ATA_ALT_OFFSET (0x1000) +#define CONFIG_SYS_ATA_DATA_OFFSET 0 +#define CONFIG_SYS_ATA_REG_OFFSET 0 +#define CONFIG_SYS_ATA_ALT_OFFSET (0x1000) /* * The constants ROM_TEXT_ADRS, ROM_SIZE, RAM_HIGH_ADRS, and RAM_LOW_ADRS |