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authorJulien Masson <jmasson@baylibre.com>2023-12-04 11:48:58 +0100
committerTom Rini <trini@konsulko.com>2023-12-19 10:09:06 -0500
commit1c2c0c635980f992e56c4a5679984721bf33ddd9 (patch)
tree57526a84aada6db0165a2b809bbfc2956fb36842 /board/mediatek
parent5679eccb83f29c1fa149655fd798b229b2fc1753 (diff)
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board: mediatek: add MT8365 EVK board support
This adds support for the MT8365 EVK board with the following features enabled/tested: Boot, UART, Watchdog and MMC. Signed-off-by: Julien Masson <jmasson@baylibre.com>
Diffstat (limited to 'board/mediatek')
-rw-r--r--board/mediatek/mt8365_evk/MAINTAINERS6
-rw-r--r--board/mediatek/mt8365_evk/Makefile3
-rw-r--r--board/mediatek/mt8365_evk/mt8365_evk.c33
3 files changed, 42 insertions, 0 deletions
diff --git a/board/mediatek/mt8365_evk/MAINTAINERS b/board/mediatek/mt8365_evk/MAINTAINERS
new file mode 100644
index 0000000000..bb28ae8df7
--- /dev/null
+++ b/board/mediatek/mt8365_evk/MAINTAINERS
@@ -0,0 +1,6 @@
+MT8365 EVK
+M: Julien Masson <jmasson@baylibre.com>
+S: Maintained
+F: arch/arm/dts/mt8365-evk.dts
+F: board/mediatek/mt8365_evk/
+F: configs/mt8365_evk_defconfig
diff --git a/board/mediatek/mt8365_evk/Makefile b/board/mediatek/mt8365_evk/Makefile
new file mode 100644
index 0000000000..90fc92b28c
--- /dev/null
+++ b/board/mediatek/mt8365_evk/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += mt8365_evk.o
diff --git a/board/mediatek/mt8365_evk/mt8365_evk.c b/board/mediatek/mt8365_evk/mt8365_evk.c
new file mode 100644
index 0000000000..723a50fec0
--- /dev/null
+++ b/board/mediatek/mt8365_evk/mt8365_evk.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2023 BayLibre SAS
+ * Author: Julien Masson <jmasson@baylibre.com>
+ */
+
+#include <asm/armv8/mmu.h>
+
+int board_init(void)
+{
+ return 0;
+}
+
+static struct mm_region mt8365_evk_mem_map[] = {
+ {
+ /* DDR */
+ .virt = 0x40000000UL,
+ .phys = 0x40000000UL,
+ .size = 0xc0000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE,
+ }, {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 0x20000000UL,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ }, {
+ 0,
+ }
+};
+
+struct mm_region *mem_map = mt8365_evk_mem_map;