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| author | Yuantian Tang <andy.tang@nxp.com> | 2020-03-19 16:48:23 +0800 |
|---|---|---|
| committer | Priyanka Jain <priyanka.jain@nxp.com> | 2020-04-29 11:10:54 +0530 |
| commit | 7dfa44f72edb482d184613d0199e17dfc116d2f8 (patch) | |
| tree | b8bd2c106136f020f66769867be8b64c59fddf57 /board/freescale | |
| parent | 643f5b47ec06519815db1d63a2dba29bcedaa4fa (diff) | |
| download | u-boot-7dfa44f72edb482d184613d0199e17dfc116d2f8.tar.gz u-boot-7dfa44f72edb482d184613d0199e17dfc116d2f8.tar.bz2 u-boot-7dfa44f72edb482d184613d0199e17dfc116d2f8.zip | |
board: freescale: ls1028a: mux changes for lpuart
mux changes in board file to enable lpuart1 and macro
define for lpuart1 used for mux changes in board configuation
register 13
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/ls1028a/ls1028a.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c index 0b7504aea1..1e2973f0c8 100644 --- a/board/freescale/ls1028a/ls1028a.c +++ b/board/freescale/ls1028a/ls1028a.c @@ -31,6 +31,7 @@ DECLARE_GLOBAL_DATA_PTR; int config_board_mux(void) { +#ifndef CONFIG_LPUART #if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS) u8 reg; @@ -55,9 +56,18 @@ int config_board_mux(void) reg &= ~(0xc0); QIXIS_WRITE(brdcfg[15], reg); #endif +#endif + return 0; } +#ifdef CONFIG_LPUART +u32 get_lpuart_clk(void) +{ + return gd->bus_clk / CONFIG_SYS_FSL_LPUART_CLK_DIV; +} +#endif + int board_init(void) { #ifdef CONFIG_ENV_IS_NOWHERE @@ -120,11 +130,33 @@ int misc_init_r(void) int board_early_init_f(void) { +#ifdef CONFIG_LPUART + u8 uart; +#endif + #ifdef CONFIG_SYS_I2C_EARLY_INIT i2c_early_init_f(); #endif fsl_lsch3_early_init_f(); + +#ifdef CONFIG_LPUART + /* + * Field| Function + * -------------------------------------------------------------- + * 7-6 | Controls I2C3 routing (net CFG_MUX_I2C3): + * I2C3 | 11= Routes {SCL, SDA} to LPUART1 header as {SOUT, SIN}. + * -------------------------------------------------------------- + * 5-4 | Controls I2C4 routing (net CFG_MUX_I2C4): + * I2C4 |11= Routes {SCL, SDA} to LPUART1 header as {CTS_B, RTS_B}. + */ + /* use lpuart0 as system console */ + uart = QIXIS_READ(brdcfg[13]); + uart &= ~CFG_LPUART_MUX_MASK; + uart |= CFG_LPUART_EN; + QIXIS_WRITE(brdcfg[13], uart); +#endif + return 0; } |