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author | Michal Simek <michal.simek@xilinx.com> | 2014-03-13 12:58:20 +0100 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2014-05-13 09:13:49 +0200 |
commit | 2df9d5c431fca07c9868a36b48ee771bde6b19e8 (patch) | |
tree | c807e83730eb5a933e23c7c8e8141aeba7fc4152 /board/astro | |
parent | f8c1be9816a60d1f627954fe202b502917c69863 (diff) | |
download | u-boot-2df9d5c431fca07c9868a36b48ee771bde6b19e8.tar.gz u-boot-2df9d5c431fca07c9868a36b48ee771bde6b19e8.tar.bz2 u-boot-2df9d5c431fca07c9868a36b48ee771bde6b19e8.zip |
fpga: xilinx: Fix the rest of CamelCases
No functional changes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'board/astro')
-rw-r--r-- | board/astro/mcf5373l/fpga.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/board/astro/mcf5373l/fpga.c b/board/astro/mcf5373l/fpga.c index 9dc82c5737..81ec192065 100644 --- a/board/astro/mcf5373l/fpga.c +++ b/board/astro/mcf5373l/fpga.c @@ -203,7 +203,7 @@ int astro5373l_altera_load(void) } /* Set the FPGA's PROG_B line to the specified level */ -int xilinx_pgm_fn(int assert, int flush, int cookie) +int xilinx_pgm_config_fn(int assert, int flush, int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -218,7 +218,7 @@ int xilinx_pgm_fn(int assert, int flush, int cookie) * Test the state of the active-low FPGA INIT line. Return 1 on INIT * asserted (low). */ -int xilinx_init_fn(int cookie) +int xilinx_init_config_fn(int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -226,7 +226,7 @@ int xilinx_init_fn(int cookie) } /* Test the state of the active-high FPGA DONE pin */ -int xilinx_done_fn(int cookie) +int xilinx_done_config_fn(int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -234,7 +234,7 @@ int xilinx_done_fn(int cookie) } /* Abort an FPGA operation */ -int xilinx_abort_fn(int cookie) +int xilinx_abort_config_fn(int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; /* ensure all SPI peripherals and FPGAs are deselected */ @@ -300,7 +300,7 @@ int xilinx_post_config_fn(int cookie) return rc; } -int xilinx_clk_fn(int assert_clk, int flush, int cookie) +int xilinx_clk_config_fn(int assert_clk, int flush, int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -311,7 +311,7 @@ int xilinx_clk_fn(int assert_clk, int flush, int cookie) return assert_clk; } -int xilinx_wr_fn(int assert_write, int flush, int cookie) +int xilinx_wr_config_fn(int assert_write, int flush, int cookie) { gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -322,7 +322,7 @@ int xilinx_wr_fn(int assert_write, int flush, int cookie) return assert_write; } -int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie) +int xilinx_fastwr_config_fn(void *buf, size_t len, int flush, int cookie) { size_t bytecount = 0; gpio_t *gpiop = (gpio_t *)MMAP_GPIO; @@ -365,13 +365,13 @@ int xilinx_fastwr_fn(void *buf, size_t len, int flush, int cookie) */ xilinx_spartan3_slave_serial_fns xilinx_fns = { xilinx_pre_config_fn, - xilinx_pgm_fn, - xilinx_clk_fn, - xilinx_init_fn, - xilinx_done_fn, - xilinx_wr_fn, + xilinx_pgm_config_fn, + xilinx_clk_config_fn, + xilinx_init_config_fn, + xilinx_done_config_fn, + xilinx_wr_config_fn, 0, - xilinx_fastwr_fn + xilinx_fastwr_config_fn }; xilinx_desc xilinx_fpga[CONFIG_FPGA_COUNT] = { @@ -395,12 +395,12 @@ int astro5373l_xilinx_load(void) * so set stuff here instead of static initialisation: */ xilinx_fns.pre = xilinx_pre_config_fn; - xilinx_fns.pgm = xilinx_pgm_fn; - xilinx_fns.clk = xilinx_clk_fn; - xilinx_fns.init = xilinx_init_fn; - xilinx_fns.done = xilinx_done_fn; - xilinx_fns.wr = xilinx_wr_fn; - xilinx_fns.bwr = xilinx_fastwr_fn; + xilinx_fns.pgm = xilinx_pgm_config_fn; + xilinx_fns.clk = xilinx_clk_config_fn; + xilinx_fns.init = xilinx_init_config_fn; + xilinx_fns.done = xilinx_done_config_fn; + xilinx_fns.wr = xilinx_wr_config_fn; + xilinx_fns.bwr = xilinx_fastwr_config_fn; xilinx_fpga[i].iface_fns = (void *)&xilinx_fns; fpga_add(fpga_xilinx, &xilinx_fpga[i]); } |