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authorSedji Gaouaou <sedji.gaouaou@atmel.com>2009-06-24 08:32:09 +0200
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2009-07-06 21:50:09 +0200
commit0aafde1dc76d6d65d6be10bf499ec86d9ffee8b9 (patch)
treef2b006c740f5e4af2469cefd81a58a730b46e530 /board/afeb9260
parent5710de45808eb8f1cc34b51dc3e67e2422113249 (diff)
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at91sam9260/9263: add back up for the rst(reset controller).
On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was set to 0 after being set to 500 ms for the PHY reset. Do backup the old reset length and restore it after the MACB initialisation. Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com> Signed-off-by: Stelian Pop <stelian@popies.net>
Diffstat (limited to 'board/afeb9260')
-rw-r--r--board/afeb9260/afeb9260.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/board/afeb9260/afeb9260.c b/board/afeb9260/afeb9260.c
index a247663bb4..94a65c27a2 100644
--- a/board/afeb9260/afeb9260.c
+++ b/board/afeb9260/afeb9260.c
@@ -81,6 +81,8 @@ static void afeb9260_nand_hw_init(void)
#ifdef CONFIG_MACB
static void afeb9260_macb_hw_init(void)
{
+ unsigned long rstc;
+
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
@@ -103,6 +105,8 @@ static void afeb9260_macb_hw_init(void)
pin_to_mask(AT91_PIN_PA28),
pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
+ rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
+
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
AT91_RSTC_ERSTL | (0x0D << 8) |
@@ -115,7 +119,7 @@ static void afeb9260_macb_hw_init(void)
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
- AT91_RSTC_ERSTL | (0x0 << 8) |
+ (rstc) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */