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authorTony Dinh <mibodhi@gmail.com>2022-02-03 14:32:29 -0800
committerStefan Roese <sr@denx.de>2022-02-10 07:12:16 +0100
commitc153576d8dfc80c651a7edb046adbaa1c1c17e42 (patch)
tree671754fdf6b3c2274c3bf705e920cdb8260f82c5 /board/Seagate
parentba4e6f8a5ef9650b47ec6b65dc875508c8916380 (diff)
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arm: kirkwood: Dockstar : Add DM Ethernet
The Dockstar board has the network chip Marvell 88E1116R. Convert to Ethernet driver model, and use uclass mvgbe and the compatible driver M88E1118R to bring up Ethernet. - Add CONFIG_DM_ETH and associated configs. - Add board_eth_init() to use uclass mvgbe to bring up the network. And remove ad-hoc code. - Add CONFIG_PHY_MARVELL to properly configure the network. - Currently, CONFIG_RESET_PHY_R symbol is used in arch/arm/mach-kirkwood/include/mach/config.h for all Kirkwood boards with mv8831116 PHY, with each board defines the function reset_phy(). Undefine it for this board. - Miscellaneous changes: Move constants to .c file and remove header file board/Seagate/dockstar/dockstar.h, use CONFIG_SYS_THUMB_BUILD to keep u-boot image under 512K, add CONFIG_HUSH_PARSER, use BIT macro, and cleanup comments. - Note: This patch is a RESEND for a previous patch: https://patchwork.ozlabs.org/project/uboot/patch/20210812051854.1340-2-mibodhi@gmail.com/ Signed-off-by: Tony Dinh <mibodhi@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/Seagate')
-rw-r--r--board/Seagate/dockstar/dockstar.c62
-rw-r--r--board/Seagate/dockstar/dockstar.h27
2 files changed, 20 insertions, 69 deletions
diff --git a/board/Seagate/dockstar/dockstar.c b/board/Seagate/dockstar/dockstar.c
index fb69193158..d72e3ef24e 100644
--- a/board/Seagate/dockstar/dockstar.c
+++ b/board/Seagate/dockstar/dockstar.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
+ * Copyright (C) 2022 Tony Dinh <mibodhi@gmail.com>
* Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
*
* Based on sheevaplug.c originally written by
@@ -11,18 +12,22 @@
#include <common.h>
#include <bootstage.h>
#include <init.h>
-#include <miiphy.h>
-#include <net.h>
+#include <netdev.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
#include <asm/arch/cpu.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/mach-types.h>
-#include "dockstar.h"
+#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
+#define DOCKSTAR_OE_LOW (~(0))
+#define DOCKSTAR_OE_HIGH (~(0))
+#define DOCKSTAR_OE_VAL_LOW BIT(29) /* USB_PWEN low */
+#define DOCKSTAR_OE_VAL_HIGH BIT(17) /* LED pin high */
+
int board_early_init_f(void)
{
/*
@@ -92,6 +97,11 @@ int board_early_init_f(void)
return 0;
}
+int board_eth_init(struct bd_info *bis)
+{
+ return cpu_eth_init(bis);
+}
+
int board_init(void)
{
/*
@@ -105,53 +115,21 @@ int board_init(void)
return 0;
}
-#ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
-{
- u16 reg;
- u16 devadr;
- char *name = "egiga0";
-
- if (miiphy_set_current_dev(name))
- return;
-
- /* command to read PHY dev address */
- if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
- printf("Err..%s could not read PHY dev address\n",
- __FUNCTION__);
- return;
- }
-
- /*
- * Enable RGMII delay on Tx and Rx for CPU port
- * Ref: sec 4.7.2 of chip datasheet
- */
- miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
- miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
- reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
- miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
- miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
-
- /* reset the phy */
- miiphy_reset(name, devadr);
-
- printf("88E1116 Initialized on %s\n", name);
-}
-#endif /* CONFIG_RESET_PHY_R */
-
#if CONFIG_IS_ENABLED(BOOTSTAGE)
-#define GREEN_LED (1 << 14)
-#define ORANGE_LED (1 << 15)
+#define GREEN_LED BIT(14)
+#define ORANGE_LED BIT(15)
#define BOTH_LEDS (GREEN_LED | ORANGE_LED)
#define NEITHER_LED 0
static void set_leds(u32 leds, u32 blinking)
{
struct kwgpio_registers *r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
- u32 oe = readl(&r->oe) | BOTH_LEDS;
+ u32 oe;
+ u32 bl;
+
+ oe = readl(&r->oe) | BOTH_LEDS;
writel(oe & ~leds, &r->oe); /* active low */
- u32 bl = readl(&r->blink_en) & ~BOTH_LEDS;
+ bl = readl(&r->blink_en) & ~BOTH_LEDS;
writel(bl | blinking, &r->blink_en);
}
diff --git a/board/Seagate/dockstar/dockstar.h b/board/Seagate/dockstar/dockstar.h
deleted file mode 100644
index cbb1644476..0000000000
--- a/board/Seagate/dockstar/dockstar.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
- *
- * Based on sheevaplug.h originally written by
- * Prafulla Wadaskar <prafulla@marvell.com>
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- */
-
-#ifndef __DOCKSTAR_H
-#define __DOCKSTAR_H
-
-#define DOCKSTAR_OE_LOW (~(0))
-#define DOCKSTAR_OE_HIGH (~(0))
-#define DOCKSTAR_OE_VAL_LOW (1 << 29) /* USB_PWEN low */
-#define DOCKSTAR_OE_VAL_HIGH (1 << 17) /* LED pin high */
-
-/* PHY related */
-#define MV88E1116_LED_FCTRL_REG 10
-#define MV88E1116_CPRSP_CR3_REG 21
-#define MV88E1116_MAC_CTRL_REG 21
-#define MV88E1116_PGADR_REG 22
-#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
-#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
-
-#endif /* __DOCKSTAR_H */