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| author | Peng Fan <peng.fan@nxp.com> | 2021-08-07 16:00:34 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2021-08-09 14:46:50 +0200 |
| commit | c17f5935cf5f9decdbe5ac59662f8ca2a1b7efe2 (patch) | |
| tree | 264abc3846f571dc0a37ea1b8fcd650f4c0149df /arch | |
| parent | 77c3b9cc98cb1bfe719933d14cc6e9e279bcb34c (diff) | |
| download | u-boot-c17f5935cf5f9decdbe5ac59662f8ca2a1b7efe2.tar.gz u-boot-c17f5935cf5f9decdbe5ac59662f8ca2a1b7efe2.tar.bz2 u-boot-c17f5935cf5f9decdbe5ac59662f8ca2a1b7efe2.zip | |
imx: imx8ulp: add get reset cause
Add get reset cause function to show what triggerred reset.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-imx/imx8ulp/soc.c | 69 |
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx8ulp/soc.c b/arch/arm/mach-imx/imx8ulp/soc.c index dcb8dc019f..cf211404f9 100644 --- a/arch/arm/mach-imx/imx8ulp/soc.c +++ b/arch/arm/mach-imx/imx8ulp/soc.c @@ -32,6 +32,73 @@ enum bt_mode get_boot_mode(void) return LOW_POWER_BOOT; } +#define CMC_SRS_TAMPER BIT(31) +#define CMC_SRS_SECURITY BIT(30) +#define CMC_SRS_TZWDG BIT(29) +#define CMC_SRS_JTAG_RST BIT(28) +#define CMC_SRS_CORE1 BIT(16) +#define CMC_SRS_LOCKUP BIT(15) +#define CMC_SRS_SW BIT(14) +#define CMC_SRS_WDG BIT(13) +#define CMC_SRS_PIN_RESET BIT(8) +#define CMC_SRS_WARM BIT(4) +#define CMC_SRS_HVD BIT(3) +#define CMC_SRS_LVD BIT(2) +#define CMC_SRS_POR BIT(1) +#define CMC_SRS_WUP BIT(0) + +static u32 reset_cause = -1; + +static char *get_reset_cause(char *ret) +{ + u32 cause1, cause = 0, srs = 0; + void __iomem *reg_ssrs = (void __iomem *)(SRC_BASE_ADDR + 0x88); + void __iomem *reg_srs = (void __iomem *)(SRC_BASE_ADDR + 0x80); + + if (!ret) + return "null"; + + srs = readl(reg_srs); + cause1 = readl(reg_ssrs); + + reset_cause = cause1; + + cause = cause1 & (CMC_SRS_POR | CMC_SRS_WUP | CMC_SRS_WARM); + + switch (cause) { + case CMC_SRS_POR: + sprintf(ret, "%s", "POR"); + break; + case CMC_SRS_WUP: + sprintf(ret, "%s", "WUP"); + break; + case CMC_SRS_WARM: + cause = cause1 & (CMC_SRS_WDG | CMC_SRS_SW | + CMC_SRS_JTAG_RST); + switch (cause) { + case CMC_SRS_WDG: + sprintf(ret, "%s", "WARM-WDG"); + break; + case CMC_SRS_SW: + sprintf(ret, "%s", "WARM-SW"); + break; + case CMC_SRS_JTAG_RST: + sprintf(ret, "%s", "WARM-JTAG"); + break; + default: + sprintf(ret, "%s", "WARM-UNKN"); + break; + } + break; + default: + sprintf(ret, "%s-%X", "UNKN", cause1); + break; + } + + debug("[%X] SRS[%X] %X - ", cause1, srs, srs ^ cause1); + return ret; +} + #if defined(CONFIG_DISPLAY_CPUINFO) const char *get_imx_type(u32 imxtype) { @@ -50,6 +117,8 @@ int print_cpuinfo(void) (cpurev & 0x000F0) >> 4, (cpurev & 0x0000F) >> 0, mxc_get_clock(MXC_ARM_CLK) / 1000000); + printf("Reset cause: %s\n", get_reset_cause(cause)); + printf("Boot mode: "); switch (get_boot_mode()) { case LOW_POWER_BOOT: |