diff options
author | Tero Kristo <kristo@kernel.org> | 2021-06-11 11:45:27 +0300 |
---|---|---|
committer | Lokesh Vutla <lokeshvutla@ti.com> | 2021-06-11 16:34:52 +0530 |
commit | bb318d8dc801586b5e587f7f7d508ad54022fb4b (patch) | |
tree | b22347a683c9aff1ebbeacdfd060a8ab33aafc5a /arch | |
parent | c3ebc56e2dca4a5db1cfc2268c7822504185fd30 (diff) | |
download | u-boot-bb318d8dc801586b5e587f7f7d508ad54022fb4b.tar.gz u-boot-bb318d8dc801586b5e587f7f7d508ad54022fb4b.tar.bz2 u-boot-bb318d8dc801586b5e587f7f7d508ad54022fb4b.zip |
arm: dts: k3-j72xx: correct MCU timer1 frequency
MCU timer1 is used as the tick timer for MCU R5 SPL, and the
clock-frequency defined in DT appears to be incorrect at the moment.
Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz.
Earlier setup of 25MHz went unnoticed, as there was a separate issue
with omap-timer, which caused an error to the clock by a factor of 8
with j7 devices. This problem surfaced once the omap-timer was fixed.
Signed-off-by: Tero Kristo <kristo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi index bd037be350..c3aae65b39 100644 --- a/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi @@ -33,7 +33,7 @@ compatible = "ti,omap5430-timer"; reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; - clock-frequency = <25000000>; + clock-frequency = <250000000>; u-boot,dm-spl; }; diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index fe095a6153..951331831e 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -46,7 +46,7 @@ compatible = "ti,omap5430-timer"; reg = <0x0 0x40400000 0x0 0x80>; ti,timer-alwon; - clock-frequency = <25000000>; + clock-frequency = <250000000>; u-boot,dm-spl; }; |