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author | Stefan Roese <sr@denx.de> | 2016-12-09 15:40:05 +0100 |
---|---|---|
committer | Stefan Roese <sr@denx.de> | 2017-01-25 07:04:08 +0100 |
commit | b14b0b1e7b45fd84526fc1fb07f4b7324c3b4647 (patch) | |
tree | d52d85dbea1914ca732da49be9aae1fc42f7d0ef /arch | |
parent | ff11d622eadca19918b22077e870b0bc1a5cb948 (diff) | |
download | u-boot-b14b0b1e7b45fd84526fc1fb07f4b7324c3b4647.tar.gz u-boot-b14b0b1e7b45fd84526fc1fb07f4b7324c3b4647.tar.bz2 u-boot-b14b0b1e7b45fd84526fc1fb07f4b7324c3b4647.zip |
arm64: mvebu: Armada 7k/8k: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada AP806 dtsi
file which is used by the Armada 7k/8K SoCs.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/dts/armada-ap806.dtsi | 8 | ||||
-rw-r--r-- | arch/arm/dts/armada-cp110-master.dtsi | 8 |
2 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/dts/armada-ap806.dtsi b/arch/arm/dts/armada-ap806.dtsi index efb383b9f3..3042cb154b 100644 --- a/arch/arm/dts/armada-ap806.dtsi +++ b/arch/arm/dts/armada-ap806.dtsi @@ -234,6 +234,14 @@ }; + ap_sdhci0: sdhci@6e0000 { + compatible = "marvell,armada-8k-sdhci"; + reg = <0x6e0000 0x300>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + dma-coherent; + status = "disabled"; + }; + ap_syscon: system-controller@6f4000 { compatible = "marvell,ap806-system-controller", "syscon"; diff --git a/arch/arm/dts/armada-cp110-master.dtsi b/arch/arm/dts/armada-cp110-master.dtsi index d637867615..661a69679e 100644 --- a/arch/arm/dts/armada-cp110-master.dtsi +++ b/arch/arm/dts/armada-cp110-master.dtsi @@ -206,6 +206,14 @@ utmi-port = <UTMI_PHY_TO_USB_HOST1>; status = "disabled"; }; + + cpm_sdhci0: sdhci@780000 { + compatible = "marvell,armada-8k-sdhci"; + reg = <0x780000 0x300>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + dma-coherent; + status = "disabled"; + }; }; cpm_pcie0: pcie@f2600000 { |