diff options
author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-05-07 14:18:46 +0200 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2019-07-11 10:05:15 -0400 |
commit | 58cbb671ef68214ab1aa6566307627ab37e28988 (patch) | |
tree | 9793879fc0e1c66e73bc44d0fc67196a94882718 /arch | |
parent | 68cadee6f29f4c76c9a760d7c533ee4113599dbe (diff) | |
download | u-boot-58cbb671ef68214ab1aa6566307627ab37e28988.tar.gz u-boot-58cbb671ef68214ab1aa6566307627ab37e28988.tar.bz2 u-boot-58cbb671ef68214ab1aa6566307627ab37e28988.zip |
arm: spear: Drop false comment
SPL BSS lies in SRAM and is actually initialized to 0 by the SPL in
arch/arm/lib/crt0.S:_main(), which is called by cpu_init_crit.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/arm926ejs/spear/start.S | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/cpu/arm926ejs/spear/start.S b/arch/arm/cpu/arm926ejs/spear/start.S index e69deb7926..4395985549 100644 --- a/arch/arm/cpu/arm926ejs/spear/start.S +++ b/arch/arm/cpu/arm926ejs/spear/start.S @@ -39,11 +39,6 @@ reset: */ stmdb sp!, {r0-r12,r14} bl cpu_init_crit -/* - * Clearing bss area is not done in SPL. - * BSS area lies in the DDR location which is not yet initialized - * bss is assumed to be uninitialized. - */ ldmia sp!, {r0-r12,pc} /* |