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author | Tom Rini <trini@konsulko.com> | 2016-04-04 14:34:09 -0400 |
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committer | Tom Rini <trini@konsulko.com> | 2016-04-04 14:34:09 -0400 |
commit | 4ed6ed3c27a069a00c8a557d606a05276cc4653e (patch) | |
tree | edb142ac2c9c220f4f422672ae115d85ee831d3e /arch | |
parent | 7e10a7c3bc382ff79bb6746944a0a4a0073a0faf (diff) | |
parent | 07654ba1e37e0de2ee3a5983ad510a8c2dd21035 (diff) | |
download | u-boot-4ed6ed3c27a069a00c8a557d606a05276cc4653e.tar.gz u-boot-4ed6ed3c27a069a00c8a557d606a05276cc4653e.tar.bz2 u-boot-4ed6ed3c27a069a00c8a557d606a05276cc4653e.zip |
Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/cpu/armv8/zynqmp/Kconfig | 15 | ||||
-rw-r--r-- | arch/arm/mach-zynq/include/mach/sys_proto.h | 2 | ||||
-rw-r--r-- | arch/microblaze/cpu/interrupts.c | 26 | ||||
-rw-r--r-- | arch/microblaze/cpu/timer.c | 39 |
4 files changed, 61 insertions, 21 deletions
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig index 9a19dfa77f..6c71d7840e 100644 --- a/arch/arm/cpu/armv8/zynqmp/Kconfig +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@ -1,13 +1,5 @@ if ARCH_ZYNQMP -choice - prompt "Xilinx ZynqMP board select" - -config TARGET_ZYNQMP_EP - bool "ZynqMP EP Board" - -endchoice - config SYS_BOARD default "zynqmp" @@ -18,7 +10,12 @@ config SYS_SOC default "zynqmp" config SYS_CONFIG_NAME - default "xilinx_zynqmp_ep" if TARGET_ZYNQMP_EP + string "Board configuration name" + default "xilinx_zynqmp" + help + This option contains information about board configuration name. + Based on this option include/configs/<CONFIG_SYS_CONFIG_NAME>.h header + will be used for board configuration. config ZYNQMP_USB bool "Configure ZynqMP USB" diff --git a/arch/arm/mach-zynq/include/mach/sys_proto.h b/arch/arm/mach-zynq/include/mach/sys_proto.h index 882beabe13..44c9b50fe5 100644 --- a/arch/arm/mach-zynq/include/mach/sys_proto.h +++ b/arch/arm/mach-zynq/include/mach/sys_proto.h @@ -19,6 +19,8 @@ extern int zynq_slcr_get_mio_pin_status(const char *periph); extern void zynq_ddrc_init(void); extern unsigned int zynq_get_silicon_version(void); +int zynq_board_read_rom_ethaddr(unsigned char *ethaddr); + /* Driver extern functions */ extern void ps7_init(void); diff --git a/arch/microblaze/cpu/interrupts.c b/arch/microblaze/cpu/interrupts.c index b6d6610f2f..010ca4a02c 100644 --- a/arch/microblaze/cpu/interrupts.c +++ b/arch/microblaze/cpu/interrupts.c @@ -10,10 +10,13 @@ #include <common.h> #include <command.h> +#include <fdtdec.h> #include <malloc.h> #include <asm/microblaze_intc.h> #include <asm/asm.h> +DECLARE_GLOBAL_DATA_PTR; + void enable_interrupts(void) { debug("Enable interrupts for the whole CPU\n"); @@ -112,11 +115,26 @@ static void intc_init(void) int interrupt_init(void) { int i; + const void *blob = gd->fdt_blob; + int node = 0; + + debug("INTC: Initialization\n"); + + node = fdt_node_offset_by_compatible(blob, node, + "xlnx,xps-intc-1.00.a"); + if (node != -1) { + fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); + if (base == FDT_ADDR_T_NONE) + return -1; + + debug("INTC: Base addr %lx\n", base); + intc = (microblaze_intc_t *)base; + irq_no = fdtdec_get_int(blob, node, "xlnx,num-intr-inputs", 0); + debug("INTC: IRQ NO %x\n", irq_no); + } else { + return node; + } -#if defined(CONFIG_SYS_INTC_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM) - intc = (microblaze_intc_t *)CONFIG_SYS_INTC_0_ADDR; - irq_no = CONFIG_SYS_INTC_0_NUM; -#endif if (irq_no) { vecs = calloc(1, sizeof(struct irq_action) * irq_no); if (vecs == NULL) { diff --git a/arch/microblaze/cpu/timer.c b/arch/microblaze/cpu/timer.c index 3960bbb08a..8845e07d0e 100644 --- a/arch/microblaze/cpu/timer.c +++ b/arch/microblaze/cpu/timer.c @@ -7,9 +7,12 @@ */ #include <common.h> +#include <fdtdec.h> #include <asm/microblaze_timer.h> #include <asm/microblaze_intc.h> +DECLARE_GLOBAL_DATA_PTR; + volatile int timestamp = 0; microblaze_timer_t *tmr; @@ -28,9 +31,6 @@ void __udelay(unsigned long usec) i = get_timer(0); while ((get_timer(0) - i) < (usec / 1000)) ; - } else { - for (i = 0; i < (usec * XILINX_CLOCK_FREQ / 10000000); i++) - ; } } @@ -46,12 +46,35 @@ int timer_init (void) int irq = -1; u32 preload = 0; u32 ret = 0; + const void *blob = gd->fdt_blob; + int node = 0; + u32 cell[2]; -#if defined(CONFIG_SYS_TIMER_0_ADDR) && defined(CONFIG_SYS_INTC_0_NUM) - preload = XILINX_CLOCK_FREQ / CONFIG_SYS_HZ; - irq = CONFIG_SYS_TIMER_0_IRQ; - tmr = (microblaze_timer_t *) (CONFIG_SYS_TIMER_0_ADDR); -#endif + debug("TIMER: Initialization\n"); + + node = fdt_node_offset_by_compatible(blob, node, + "xlnx,xps-timer-1.00.a"); + if (node != -1) { + fdt_addr_t base = fdtdec_get_addr(blob, node, "reg"); + if (base == FDT_ADDR_T_NONE) + return -1; + + debug("TIMER: Base addr %lx\n", base); + tmr = (microblaze_timer_t *)base; + + ret = fdtdec_get_int_array(blob, node, "interrupts", + cell, ARRAY_SIZE(cell)); + if (ret) + return ret; + + irq = cell[0]; + debug("TIMER: IRQ %x\n", irq); + + preload = fdtdec_get_int(blob, node, "clock-frequency", 0); + preload /= CONFIG_SYS_HZ; + } else { + return node; + } if (tmr && preload && irq >= 0) { tmr->loadreg = preload; |