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| author | Roger Quadros <rogerq@kernel.org> | 2024-05-13 15:13:55 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2024-05-13 09:15:46 -0600 |
| commit | 4a277312b35e7e3d5b30e1ade292b502679c6240 (patch) | |
| tree | 682a68912e669de3118a8010f0c5ba4992702b88 /arch | |
| parent | 9e0102b7011daa38220a628ce910bfd959ec2ac6 (diff) | |
| download | u-boot-4a277312b35e7e3d5b30e1ade292b502679c6240.tar.gz u-boot-4a277312b35e7e3d5b30e1ade292b502679c6240.tar.bz2 u-boot-4a277312b35e7e3d5b30e1ade292b502679c6240.zip | |
arm: dts: k3-am625-beagleplay: get CPSW Ethernet to work
Add missing bits in -u-boot.dtsi to get CPSW Ethernet working.
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi index fb2032068d..54a7702037 100644 --- a/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-beagleplay-u-boot.dtsi @@ -206,3 +206,66 @@ }; }; #endif + +&main_bcdma { + reg = <0x00 0x485c0100 0x00 0x100>, + <0x00 0x4c000000 0x00 0x20000>, + <0x00 0x4a820000 0x00 0x20000>, + <0x00 0x4aa40000 0x00 0x20000>, + <0x00 0x4bc00000 0x00 0x100000>, + <0x00 0x48600000 0x00 0x8000>, + <0x00 0x484a4000 0x00 0x2000>, + <0x00 0x484c2000 0x00 0x2000>; + reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt", + "cfg", "tchan", "rchan"; +}; + +&main_pktdma { + reg = <0x00 0x485c0000 0x00 0x100>, + <0x00 0x4a800000 0x00 0x20000>, + <0x00 0x4aa00000 0x00 0x40000>, + <0x00 0x4b800000 0x00 0x400000>, + <0x00 0x485e0000 0x00 0x20000>, + <0x00 0x484a0000 0x00 0x4000>, + <0x00 0x484c0000 0x00 0x2000>, + <0x00 0x48430000 0x00 0x4000>; + reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt", "cfg", + "tchan", "rchan", "rflow"; + bootph-all; +}; + +&mdio0_pins_default { + bootph-all; +}; + +&cpsw3g_mdio { + bootph-all; +}; + +&cpsw3g_phy0 { + bootph-all; +}; + +&rgmii1_pins_default { + bootph-all; +}; + +&cpsw3g { + bootph-all; + + ethernet-ports { + bootph-all; + }; +}; + +&phy_gmii_sel { + bootph-all; +}; + +&cpsw_port1 { + bootph-all; +}; + +&cpsw_port2 { + status = "disabled"; +}; |